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A VHDLAMS Compiler and Architecture Generator for Behavioral Synthesis of Analog Systems
 PROCEEDINGS OF DATE’99
, 1999
"... This paper presents a complete method for automatically translating VHDLAMS behavioralspecifications of analog systems into op amp level netlists of library components. We discuss the three fundamental aspects, that pertain to any behavioral synthesis environment: the specification language, the ..."
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Cited by 6 (5 self)
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This paper presents a complete method for automatically translating VHDLAMS behavioralspecifications of analog systems into op amp level netlists of library components. We discuss the three fundamental aspects, that pertain to any behavioral synthesis environment: the specification language, the rules for compiling language constructs into a technologyindependent, intermediate representation, and the synthesis (mapping) of representations to netlists (topologies) of library components, so that performance constraints are satisfied. We motivate the effectiveness of the method by presenting our synthesis results for 5 examples.
The Definition of a VHDLAMS Subset for Behavioral Synthesis of Analog Systems
 In Proc. of IEEE/VIUF BMAS
, 1998
"... This paper defines a VHDLAMS subset for behavioral synthesis of analog systems. The subset includes language constructs for describing most of the functional aspects pertaining to analog systems. Besides, these constructs can be implemented with electronic circuits. Functional aspects, which can be ..."
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This paper defines a VHDLAMS subset for behavioral synthesis of analog systems. The subset includes language constructs for describing most of the functional aspects pertaining to analog systems. Besides, these constructs can be implemented with electronic circuits. Functional aspects, which can be expressed with the subset, relate to two interacting parts. The analog part continuously processes analog signals, while the control part generates control signals for configuring the flow of signals in the analog part. However, some language constructs have to be constrained or augmented, so that they become effective for synthesis. To motivate that constructs in the subset can be synthesized, we present, by means of an example, how VHDLAMS programs are compiled into an intermediate format. The intermediate format can be either directly mapped to components from a component library, or used for further synthesisrelated optimization steps. Finally, we discuss a complete experiment for spe...
Regular Analog/RF Integrated Circuits Design Using Optimization With Recourse Including Ellipsoidal Uncertainty
, 2008
"... Abstract—Long design cycles due to the inability to predict silicon realities are a wellknown problem that plagues analog/RF integrated circuit product development. As this problem worsens for nanoscale IC technologies, the high cost of design and multiple manufacturing spins causes fewer products ..."
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Abstract—Long design cycles due to the inability to predict silicon realities are a wellknown problem that plagues analog/RF integrated circuit product development. As this problem worsens for nanoscale IC technologies, the high cost of design and multiple manufacturing spins causes fewer products to have the volume required to support fullcustom implementation. Design reuse and analog synthesis make analog/RF design more affordable; however, the increasing process variability and lack of modeling accuracy remain extremely challenging for nanoscale analog/RF design. We propose a regular analog/RF IC using metalmask configurability design methodology Optimization with Recourse of Analog Circuits including Layout Extraction (ORACLE), which is a combination of reuse and shareduse by formulating the synthesis problem as an optimization with recourse problem. Using a twostage geometric programming with recourse approach, ORACLE solves for both the globally optimal shared and applicationspecific variables. Furthermore, robust optimization is proposed to treat the design with variability problem, further enhancing the ORACLE methodology by providing yield bound for each configuration of regular designs. The statistical variations of the process parameters are captured by a confidence ellipsoid. We demonstrate ORACLE for regular Low Noise Amplifier designs using metalmask configurability, where a range of applications share common underlying structure and applicationspecific customization is performed using the metalmask layers. Two RF oscillator design examples are shown to achieve robust designs with guaranteed yield bound. Index Terms—Configurable design, optimization with recourse, robustness, statistical optimization. I.
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints
"... In this paper, a method for the automatic sizing of analog integrated circuits is presented. Basic sizing rules, representing circuit knowledge, are set up before the sizing and are introduced as structural constraints into the sizing process. Systematic consideration of these structural constrai ..."
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In this paper, a method for the automatic sizing of analog integrated circuits is presented. Basic sizing rules, representing circuit knowledge, are set up before the sizing and are introduced as structural constraints into the sizing process. Systematic consideration of these structural constraints during the automatic sizing prevents pathologically sized circuits and speeds up the automatic sizing. The sizing is done with a sensitivitybased, iterative trust region method. 1
The Frequency Domain Behavioral Modeling and Simulation of Nonlinear Analog Circuits and Systems
, 1993
"... LUNSFORD II, PHILIP J. The Frequency Domain Behavioral Modeling and Simulation of Nonlinear Analog Circuits and Systems. (Under the direction of Michael B. Steer.) A new technique for the frequencydomain behavioral modeling and simulation of nonautonomous nonlinear analog subsystems is presented. ..."
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LUNSFORD II, PHILIP J. The Frequency Domain Behavioral Modeling and Simulation of Nonlinear Analog Circuits and Systems. (Under the direction of Michael B. Steer.) A new technique for the frequencydomain behavioral modeling and simulation of nonautonomous nonlinear analog subsystems is presented. This technique extracts values of the Volterra nonlinear transfer functions and stores these values in binary files. Using these files, the modeled substem can be simulated for an arbitrary periodic input expressed as a finite sum of sines and cosines. Furthermore, the extraction can be based on any circuit simulator that is capable of steady state simulation. Thus a large system can be divided into smaller subsystems, each of which is characterized by circuit level simulations or lab measurements. The total system can then be simulated using the subsystem characterization stored as tables in binary files.
Compositional Design of Analog Systems Using Contracts
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1 Optimal Design of a CMOS OpAmp via Geometric Programming
"... ABSTRACT We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (opamps). We observe that a wide variety of design objectives and constraints have a special form, i.e., theyareposynomial functions of the design variables. As a result the ..."
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ABSTRACT We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (opamps). We observe that a wide variety of design objectives and constraints have a special form, i.e., theyareposynomial functions of the design variables. As a result the amplifier design problem can be expressed as a special form of optimization problem called geometric programming, for which very efficient global optimization methods have been developed. As a consequence we can efficiently determine globally optimal amplifier designs, or globally optimal tradeoffs among competing performance measures such as power, openloop gain, and bandwidth. Our method therefore yields completely automated synthesis of (globally) optimal CMOS amplifiers, directly from specifications. In this paper we apply this method to a specific, widely used operational amplifier architecture, showing in detail how to formulate the design problem as a geometric program. We compute globally optimal tradeoff curves relating performance measures such as power dissipation, unitygain bandwidth, and openloop gain. We show how the method can be used to synthesize robust designs, i.e., designs guaranteed to meet the specifications for a variety of process conditions and parameters. 1.1
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"... Analogue integrated circuit sizing with several optimization runs using heuristics for setting initial points Comment proportionner des circuits analogues intégrés avec plusieures marches d’optimisation à l’aide d’heuristique pour détérminer les points du départ ..."
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Analogue integrated circuit sizing with several optimization runs using heuristics for setting initial points Comment proportionner des circuits analogues intégrés avec plusieures marches d’optimisation à l’aide d’heuristique pour détérminer les points du départ