Abstract—This paper presents an implementation of a decoupled optimization technique for design of switching regulators using genetic algorithms (GAs). The optimization process entails the selection of component values in a switching regulator, in order to meet the static and dynamic requirements. Although the proposed method inherits characteristics of evolutionary computations that involve randomness, recombination, and survival of the fittest, it does not perform a whole-circuit optimization. Thus, intensive computations that are usually found in stochastic optimization techniques can be avoided. Similar to many design approaches for power electronics circuits, a regulator is decoupled into two components, namely the power conversion stage (PCS) and the feedback network (FN). The PCS is optimized with the required static characteristics, whilst the FN is optimized with the required static and dynamic behaviors of the whole system. Systematic optimization procedures will be described and the technique is illustrated with the design of a buck regulator with overcurrent protection. The predicted results are compared with the published results available in the literature and are verified with experimental measurements. Index Terms—Circuit optimization, circuit simulation, computer-aided design, genetic algorithms, power electronics. I.

In this paper, a new method for analog circuit sizing with respect to manufacturing and operating tolerances is presented. Two types of robustness objectives are presented, i.e. parameter distances for the nominal design and worstcase distances for the design centering. Moreover, the generalized boundary curve is presented as a method to determine a parameter correction within an iterative trust region algorithm. Results show that a significant reduction in computational costs is achieved using the presented robustness objectives and generalized boundary curve.

This paper presents a top-down design methodology to synthesize mixed-signal systems described at behavioral level. Our methodology is intended to automate the synthesis process of analog CMOS integrated circuits. Also, the method enables the circuit description at high level of abstraction where complex systems are easier to specify. The behavioral models are represented by a set of simultaneous differential and algebraic equations (DAEs), which are written in VHDL-AMS using simple simultaneous and procedural statements. We present an algorithm to perform the topology selection process. As an example, a Dual-Tone Multiple-Frequency decoder is synthesized from behavioral model to analog CMOS transistor level. 1 Introduction The emerging analog hardware description languages will speed up the analog verification process and enable the analog designer to describe circuits at higher levels of abstraction. Analog integrated circuits have been typically designed at circuit, component and ...

We present a method for optimizing and automating component and transistor sizing for CMOS operational amplifiers. We observe that a wide variety of performance measures can be formulated as posynomial functions of the design variables. As a result, amplifier design problems can be formulated as a geometric program, a special type of convex optimization problem for which very efficient global optimization methods have recently been developed. The synthesis method is therefore fast, and determines the globally optimal design; in particular the final solution is completely independent of the starting point (which can even be infeasible), and infeasible specifications are unambiguously detected.

Abstract—Ant colony optimization (ACO) is typically used to search paths through graphs. The concept is based on simulating the behavior of ants in finding paths from the colony to food. Its searching mechanism is applicable for optimizing electric circuits with components, like resistors and capacitors, available in discrete values. However, power electronic circuits (PECs) generally consist of components, like inductors, manufactured in continuous values. Therefore, the traditional ACO algorithm cannot be applied directly. In this paper, an extended ACO (eACO) that can search the optimal values of components manufactured in discrete and continuous values is presented. The idea is based on using the orthogonal design method (ODM) to dynamically update the database of the components available with continuous values, so that these components will have pseudo-discrete values in the search space. To speed up the optimization process, the ODM performs local search of the best combination around the best ant. The eACO also takes the component tolerances into account in evaluating the fitness value of each ant. The proposed algorithm has been successfully used to optimize the design of a buck regulator. The predicted results have been compared with the published results available in the literature and verified with experimental measurements. Index Terms—Ant colony optimization (ACO), circuit optimization, orthogonal design method (ODM), power electronics circuits

Abstract — The hierarchical graph-based sizing and biasing method of analog circuits has been previously developed. Its potential application in the field of knowledge-based analog synthesis is studied. This method reduces the number of optimization variables by taking into account their circuit dependency relations. This is done by automatically generating a design plan to express circuit dependencies. The design plan is then introduced into an optimization loop. The optimization engine uses the Nelder-Mead simplex method. The whole method is successfully applied to a single-ended two-stage amplifier. It produces simulator-like quality designs in a reasonable time, thus allowing interactive design of analog circuits. I.

this paper provides a way to generate such initial design conditions.

this paper provides a way to generate such initial design conditions.

This paper presents a user-friendly tool which allows automated sizing of IC cells. It comprises an open optimization -based sizing program, a database which allows knowledge re-use and also easy addition of new knowledge, and a powerful graphical user interface.

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.