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12
OASYS: A Framework for Analog Circuit Synthesis
, 1989
"... We describe a hierarchical structure for a knowledgebased analog circuit synthesis tool. Analog circuit topologies are represented as a hierarchy of abstract functional blocks each with associated design knowledge. We also describe mechanisms to select from among alternate design styles, and to tra ..."
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Cited by 64 (10 self)
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We describe a hierarchical structure for a knowledgebased analog circuit synthesis tool. Analog circuit topologies are represented as a hierarchy of abstract functional blocks each with associated design knowledge. We also describe mechanisms to select from among alternate design styles, and to translate performance specifications from one level in the hierarchy to the next lower level. A prototype implementation, OASYS, synthesizes sized transistor schematics for CMOS operational amplifiers and comparators from a set of performance specifications and process parameters. We describe the role such a synthesis system can play in exploring the space of designable circuits. And finally, we briefly describe other related research in analog synthesis at Carnegie Mellon, including OASYSVM, which facilitates the addition of new design topologies to the framework, and ANAGRAM, the counterpart to OASYS, which performs the circuit schematic to physical layout phase of analog circuit design 1. In...
Optimal design of a CMOS opamp via geometric programming
 IEEE Transactions on ComputerAided Design
, 2001
"... We describe a new method for determining component values and transistor dimensions for CMOS operational ampli ers (opamps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result the ampli er ..."
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Cited by 51 (10 self)
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We describe a new method for determining component values and transistor dimensions for CMOS operational ampli ers (opamps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result the ampli er design problem can be expressed as a special form of optimization problem called geometric programming, for which very e cient global optimization methods have been developed. As a consequence we can e ciently determine globally optimal ampli er designs, or globally optimal tradeo s among competing performance measures such aspower, openloop gain, and bandwidth. Our method therefore yields completely automated synthesis of (globally) optimal CMOS ampli ers, directly from speci cations. In this paper we apply this method to a speci c, widely used operational ampli er architecture, showing in detail how to formulate the design problem as a geometric program. We compute globally optimal tradeo curves relating performance measures such as power dissipation, unitygain bandwidth, and openloop gain. We show how the method can be used to synthesize robust designs, i.e., designs guaranteed to meet the speci cations for a
The Invention of CMOS Amplifiers using Genetic Programming and CurrentFlow Analysis
 IEEE Trans. on ComputerAided Design of Integrated Circuits and Systems
, 2002
"... This paper introduces an automated circuit design system for the evolution and subsequent invention of CMOS amplifiers. The proposed system relies on a mix of genetic programming and a new topologyindependent design optimisation method referred to as currentflow analysis. Genetic programming evolve ..."
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Cited by 6 (0 self)
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This paper introduces an automated circuit design system for the evolution and subsequent invention of CMOS amplifiers. The proposed system relies on a mix of genetic programming and a new topologyindependent design optimisation method referred to as currentflow analysis. Genetic programming evolves new circuit topologies from the collection of primitive devices and basic building blocks. Currentflow analysis screens and corrects circuits using topologyindependent design rules. Experimental results show a promising improvement on the design of operational amplifiers that making the automated analogue design environment using genetic programming a lot more practical. I.
Design Methodology for Analog VLSI Implementations of Error Control Decoders
, 2002
"... In order to reach the Shannon limit, researchers have found more efficient error control coding schemes. However, the computational complexity of such error control coding schemes is a barrier to implementing them. Recently, researchers have found that bioinspired analog network decoding is a good a ..."
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Cited by 4 (1 self)
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In order to reach the Shannon limit, researchers have found more efficient error control coding schemes. However, the computational complexity of such error control coding schemes is a barrier to implementing them. Recently, researchers have found that bioinspired analog network decoding is a good approach with better combined power/speed performance than its digital counterparts. However, the lack of CAD (computer aided design) tools makes the analog implementation quite time consuming and error prone. Meanwhile, the performance loss due to the nonidealities of the analog circuits has not been systematically analyzed. Also, how to organize analog circuits so that the nonideal effects are minimized has not been discussed. In designing
Simulated Annealing Algorithm with MultiMolecule: an Approach to Analog Synthesis
, 1996
"... The research presented in this paper is concerned with the design automation of analog integrated circuits, simply called analog synthesis. A new algorithm, namely a simulated annealing algorithm with multimolecule (SAMM), is proposed to solve analog synthesis problems. Besides inheriting the globa ..."
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Cited by 2 (0 self)
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The research presented in this paper is concerned with the design automation of analog integrated circuits, simply called analog synthesis. A new algorithm, namely a simulated annealing algorithm with multimolecule (SAMM), is proposed to solve analog synthesis problems. Besides inheriting the global convergence of the traditional simulated annealing algorithm (SA), SAMM can avoid the excessively timeconsuming final iterations of SA, which makes it more efficient and suitable for analog synthesis. Several analog synthesis examples are also given in this paper to demonstrate the efficiency and validity of SAMM.
Adaptive Sampling and Modeling of Analog Circuit Performance Parameters
 In Proc. VLSISOC
, 2003
"... Many approaches to analog performance parameter macro modeling have been investigated by the research community. These models are typically derived from discrete data obtained from circuit simulation using numerous input combinations of component sizes for a given circuit topology. The simulations a ..."
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Cited by 2 (1 self)
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Many approaches to analog performance parameter macro modeling have been investigated by the research community. These models are typically derived from discrete data obtained from circuit simulation using numerous input combinations of component sizes for a given circuit topology. The simulations are computationally intensive, therefore it is advantageous to reduce the number of simulations necessary to build an accurate macro model. We present a new algorithm for adaptively sampling multidimensional black box functions based on Duchon pseudocubic splines. The splines readily and accurately model high dimensional functions based on discrete unstructured data and require no tuning of parameters as seen in many other interpolation methods. The adaptive sampler, in conjunction with pseudocubic splines, is used to accurately model various analog performance parameters for an operational amplifier topology using fewer sample points than traditional gridded and quasirandom sampling methodologies.
ADAPT: Design assistance for iterative analog synthesis
 1314 May 2002, Bremen), GMMFachbericht 38, VDE Verlag GMBH
, 2002
"... This paper presents an analog circuit design assistance tool called Adapt. The tool can perform automatic circuit sizing over a wide range of heterogeneous design parameters. We present Adapt's architecture and the design flow, discuss important userinterface aspects of the tool, disclose details o ..."
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Cited by 1 (1 self)
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This paper presents an analog circuit design assistance tool called Adapt. The tool can perform automatic circuit sizing over a wide range of heterogeneous design parameters. We present Adapt's architecture and the design flow, discuss important userinterface aspects of the tool, disclose details on the optimization algorithms incorporated in the tool, and demonstrate the practical strength of the tool. The industrialstrength capabilities of the tool are showcased using an RF lownoise amplifier that is used in Bluetooth applications.
A Design Strategy for the Synthesis of HighPerformance Instrumentation Amplifiers
, 1996
"... In this paper, the design strategy for a circuit synthesis program is described. Unlike other synthesis programs, the program searches in an extremely large set of possible circuits (over 1,000,000 possible circuit configurations), and is not restricted to one device technology. It uses ..."
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Cited by 1 (0 self)
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In this paper, the design strategy for a circuit synthesis program is described. Unlike other synthesis programs, the program searches in an extremely large set of possible circuits (over 1,000,000 possible circuit configurations), and is not restricted to one device technology. It uses
Global Design of Analog Cells using Statistical Optimization Techniques
 Kluwer Academics Pubs
, 1994
"... We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. This methodology enables to design complex analog cells from scratch within reasonable CPU time. Three different specification types are covered: strong constraints on the ele ..."
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We present a methodology for automated sizing of analog cells using statistical optimization in a simulation based approach. This methodology enables to design complex analog cells from scratch within reasonable CPU time. Three different specification types are covered: strong constraints on the electrical performance of the cells, weak constraints on this performance, and design objectives. A mathematical cost function is proposed and a bunch of heuristics is given to increase accuracy and reduce CPU time to minimize the cost function. A technique is also presented to yield designs with reduced variability in the performance parameters, under random variations of the transistor technological parameters. Several CMOS analog cells with complexity levels up to 48 transistors are designed for illustration. Measurements from fabricated prototypes demonstrate the suitability of the proposed methodology. Global Design of Analog Cells using Statistical Optimization Techniques 3 Global Desig...
Statistical Analysis of Linear Analog Circuits Using Gaussian Message Passing in Factor Graphs
, 2009
"... This thesis introduces a novel application of factor graphs to the domain of analog circuits. It proposes a technique of leveraging factor graphs for performing statistical yield analysis of analog circuits that is much faster than the standard Monte Carlo/Simulation Program With Integrated Circuit ..."
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This thesis introduces a novel application of factor graphs to the domain of analog circuits. It proposes a technique of leveraging factor graphs for performing statistical yield analysis of analog circuits that is much faster than the standard Monte Carlo/Simulation Program With Integrated Circuit Emphasis (SPICE) simulation techniques. We have designed a tool chain to model an analog circuit and its corresponding factor graph and then use a Gaussian message passing approach along the edges of the graph for yield calculation. The tool is also capable of estimating unknown parameters of the circuit given known output statistics through backward message propagation in the factor graph. The tool builds upon the concept of domainspecific modeling leveraged for modeling and interpreting different kinds of analog circuits. Generic Modeling Environment (GME) is used to design modeling environment for analog circuits. It is a configurable tool set that supports creation of domainspecific design environments for different applications. This research has developed a generalized methodology that could be applied towards design automation of different kinds of analog circuits, both linear and nonlinear. The tool has been successfully used to model linear amplifier circuits and a nonlinear Metal Oxide Semiconductor Field Effect Transistor (MOSFET) circuit. The results obtained by Monte Carlo simulationsiv performed on these circuits are used as a reference in the project to compare against the toolâ€™s results. The tool is tested for its efficiency in terms of time and accuracy against the standard results. (104 pages) To my loving family and friends.... v vi