Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget available. The use of GaAs--AlGaAs multiple-quantum-well p-i-n diodes for on-chip detection and modulation is one effective means of implementing the optoelectronic transceivers. We discuss a potential roadmap for the scaling of this hybrid optoelectronic VLSI technology as CMOS linewidths shrink and the characteristics of the hybrid optoelectronic tranceiver technology improve. An important general conclusion is that, unlike electrical interconnects, such dense optical interconnections directly to an electronic circuit will likely be able to scale in capacity to match the improved performance of futur...

Abstract — We examine the current performance and future demands of interconnects to and on silicon chips. We compare electrical and optical interconnects and project the requirements for optoelectronic and optical devices if optics is to solve the major problems of interconnects to future high performance silicon chips. Optics has potential benefits in interconnect density, energy and timing. The necessity of low interconnect energy imposes low limits especially on the energy of the optical output devices, with a ~ 10 fJ/bit device energy target emerging. Some optical modulators and radical laser approaches may meet this requirement. Low (e.g., a few fF or less) photodetector capacitance is important. Very compact wavelength splitters are essential for connecting the information to fibers. Dense waveguides are necessary on-chip or on boards for guided wave optical approaches, especially if very high clock rates or dense WDM are to be avoided. Free space optics potentially can handle the necessary bandwidths even without fast clocks or WDM. With such technology, however, optics may enable the continued scaling of interconnect capacity required by future chips. Index Terms—ITRS roadmap, optical interconnections, optical modulators O I.

Analog Fourier optical processing systems can perform important classes of signal processing operations in parallel, but suffer from limited accuracy. Digital–optical equivalents of such systems could be built that share many features of the analog systems while allowing greater accuracy. We show that the digital equivalent of any system consisting of an arbitrary number of lenses, filters, spatial light modulators, and sections of free space can be constructed. There are many possible applications for such systems as well as many alternative technologies for constructing them; this paper stresses the potential of free-space interconnected active-device-plane-based optoelectronic architectures as a digital signal processing environment. Implementation of the active-device planes through hybridization of optoelectronic components with silicon electronics should allow the realization of systems whose performance exceeds that of purely electronic systems. r 1996 Optical Society of America 1.

We show that there is a limit to the total number of bits per second, B, of information that can flow in a simple digital electrical interconnection that is set only by the ratio of the length l of the interconnection to the total cross-sectional dimension p A of the interconnect wiring—the “aspect ratio ” of the interconnection. This limit is largely independent of the details of the design of the electrical lines. The limit is approximately B BoA/l2 bits/s, with Bo 1015 (bit/s) for high-performance strip lines and cables, 1016 for small on-chip lines, and 1017 –1018 for equalized lines. Because the limit is scale-invariant, neither growing nor shrinking the system substantially changes the limit. Exceeding this limit requires techniques such as repeatering, coding, and multilevel modulation. Such a limit will become a problem as machines approach Tb/s information bandwidths. The limit will particularly affect architectures in which one processor must talk reasonably directly with many others. We argue that optical interconnects can solve this problem since they avoid the resistive loss physics that gives this limit. © 1997 Academic Press 1.

Optics may allow interconnects to continue to scale to match the processing ability of future electronic chips, though very-low-energy optoelectronic devices and novel compact optics will be needed. By David A. B. Miller, Fellow IEEE ABSTRACT | We examine the current performance and future demands of interconnects to and on silicon chips. We compare electrical and optical interconnects and project the requirements for optoelectronic and optical devices if optics is to solve the major problems of interconnects for future highperformance silicon chips. Optics has potential benefits in interconnect density, energy, and timing. The necessity of low interconnect energy imposes low limits especially on the energy of the optical output devices, with a 10 fJ/bit device energy target emerging. Some optical modulators and radical laser approaches may meet this requirement. Low (e.g., a few femtofarads or less) photodetector capacitance is important. Very compact wavelength splitters are essential for connecting the information to fibers. Dense waveguides are necessary onchip or on boards for guided wave optical approaches, especially if very high clock rates or dense wavelength-division multiplexing (WDM) is to be avoided. Free-space optics potentially can handle the necessary bandwidths even without fast clocks or WDM. With such technology, however, optics may enable the continued scaling of interconnect capacity required by future chips.