Recently, various multibit noise-shaping digital-toanalog converters (DAC's) have been proposed that use digital signal processing techniques to cause the DAC noise arising from analog component mismatches to be spectrally shaped. Such DAC's have the potential to significantly increase the present precision limits of 16 data converters by eliminating the need for one-bit quantization in delta-sigma modulators. This paper extends the practicality of the noise-shaping DAC approach by presenting a general noise-shaping DAC architecture along with two special-case configurations that achieve first- and second-order noise-shaping, respectively. The second-order DAC configuration, in particular, is the least complex of those currently known to the author. Additionally, the paper provides a rigorous explanation of the apparent paradox of how the DAC noise can be spectrally shaped even though the sources of the DAC noise---the errors introduced by the analog circuitry---are not known to the ...

Abstract—61-modulation is a proven method to realize high- and very high-resolution analog-to-digital converters. A particularly efficient way to implement such a modulator uses double-sampling where the circuit operates during both clock phases of the master-clock. Hence, the sampling frequency is twice the master-clock frequency. Unfortunately, path mismatch between both sampling branches causes a part of the quantization noise to fold from the Nyquist frequency back in the signal band. Therefore, the performance is severely degraded. In this paper, we show that the problem is reduced but not eliminated by employing multibit quantization. Next, we present an indepth solution for the problem. The approach consists of modifying the quantization noise transfer function of the overall modulator to have one or several zeros at the Nyquist frequency. This way the effect of noise folding can nearly be eliminated. It is shown that this can be implemented by a simple modification of one of the integrators of the overall modulator circuit. Finally, several design examples of single-bit and multibit modulators are discussed. Index Terms—Analog-to-digital conversion, double-sampling, spectral shaping.

The high-order \Sigma-\Delta modulator is an appropriate approach for high-bandwidth, high-resolution A/D conversion. However, non-ideal effects such as the finite opamp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance under the inevitable non-ideal effects, we explore several multiple-bit schemes, based on our CIQE high-order \Sigma-\Delta architecture, to remove the non-ideal deterioration. Design rules of these multiple-bit schemes are developed and verified by extensive simulations. I. Introduction The A/D converter is an important element for digitalsignal processing systems. The cruxes of an A/D converter are high resolution for precise representation of the original signal and high bandwidth for fast processing. Conventional A/D architectures, e.g., flash, 2-step flash, and successive approximation, are not suitable for highresolution applications because of the need of near-ideal analog component...

This paper proposes a novel architecture synthesis algorithm for single-loop single-bit ∆Σ modulators. We defined a generic modulator architecture, derived its transfer function (TF), and used the TF in a MINLP formulation to generate optimal topologies for a variety of requirements. Experiments show the superiority of synthesized topologies as compared to traditional solutions. 1.

Abstract not found

endorsement of any of the University of Pennsylvania's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. This paper is posted at ScholarlyCommons.

Integration of analog-to-digital signal conversion circuits into digital submicron silicon chips is required for many applications. This is typically implemented by sigma–delta circuits, which can provide good resolution without requiring trimming of component values. This paper presents an analytical comparison of noise performance in four alternative sigma–delta circuit configurations which have been presented in the literature, consisting of discrete-time and continuous-time integration in voltage-mode and in current-mode. For high resolution, superiority of switched-capacitor circuits over the alternatives is shown, based on process technology considerations. Design guidelines are outlined for selecting oversampling rate and other key parameters, in order to obtain maximal data resolution. Keywords: Analog–digital conversion; sigma–delta modulation; signal-to-noise analysis; low voltage CMOS; switched capacitors; switched current. 1.