A CMOS 64 # 64 pixel area image sensor chip using Sigma-Delta modulation at each pixel for A#D conversion is described. The image data output is digital. The chip was fabricated using a 1.2#mtwo layer metal single layer poly n-well CMOS process. Each pixel block consists of a phototransistor and 22 MOS transistors. Test results demonstrate a dynamic range potentially greater than 93dB, a signal to noise ratio #SNR# of up to 61dB, and dissipation of less than 1mW with a 5V power supply. 1 Boyd Fowler, Abbas El Gamal, and David X. D. Yang 2 Charge-coupled devices #CCD# are at present the most widely used technology for implementing area image sensors. CCD image sensors have their shortcomings, however. They su#er from low yields, they consume too muchpower #3#, and they are plagued with SNR limitations due to the shifting and detection of analog charge packets, and the fact that data is communicated o# chip in analog form. Several alternatives to CCD area image sensors that use st...

ii An important trend in the design of digital cameras is the integration of capture and processing onto a single CMOS chip. Although integrating the components of a digital camera system onto a single chip significantly reduces system size and power, it does not fully exploit the potential advantages of integration. We argue that a key advantage of integration is the ability to exploit the high speed imaging capability of CMOS image sensors to enable new applications and to improve the performance of existing still and video processing applications. The idea is to capture frames at much higher frame rates than the standard frame rate, process the high frame rate data on chip, and output the video sequence and the application specific data at standard frame rate. In the first part of the dissertation we discuss two applications of this idea. The first is optical flow estimation, which is the basis for many video applications. We present a method for obtaining high accuracy optical flow estimates at a standard