ACKNOWLEDGMENTS I would like to thank everyone who helped me along the way from my advisor, Paul Hasler, to my colleagues within the CADSP research group. I would also like to thank my friends and family who encouraged me throughout the process. However, my greatest thanks goes to my ever loving wife, Shannon, who has endured many things throughout my graduate life that I have no doubt caused. I could never have managed through these last few years without her love, support, and most of all, patience.

This article presents two new, reconfigurable multi-input floating-gate circuits able to produce either the INVERTED SUM / INVERTED CARRY functions for a FULL-ADDER, XNOR / NAND, or XOR / NOR. The circuits contain four MOSFETs and fourteen or nine capacitors, respectively. SPICE simulations are shown, demonstrating the principal operation, together with preliminary measurements indicating that the circuits might operate in subthreshold, with supply voltages down to a few hundred mV. Measurements demonstrate the inverter function for Vdd from 93 mV up to 800 mV. KeyM0 ds---FGUVMOS, universal element, XNOR, NAND, XOR, NOR, full-adder. I.