A set of test structures designed to characterize and compare the performance of CMOS passive and active pixel image sensors is presented. The test structures are designed so that they can be rapidly ported from one process to another. They are also designed so that individual photodetectors and pixel circuits as well as entire image sensor arrays can be characterized and compared based on: quantum e#ciency, spectral response, #xed pattern noise, sensitivity, blooming, input referred read noise, reduction of quantum e#ciency caused by silicide#salicide, lag, digital switching noise sensitivity, impact ionization noise sensitivity, dynamic range, and temperature dependency of all measured parameters. Four test chips that include a variety of these structures have been built in two di#erent 0.35#m CMOS processes. The test chips include nineteen types of individual photodetectors and thirty eighttypes of 64#64 pixel arrays. The test methodology and preliminary test results from these chip...

ii An important trend in the design of digital cameras is the integration of capture and processing onto a single CMOS chip. Although integrating the components of a digital camera system onto a single chip significantly reduces system size and power, it does not fully exploit the potential advantages of integration. We argue that a key advantage of integration is the ability to exploit the high speed imaging capability of CMOS image sensors to enable new applications and to improve the performance of existing still and video processing applications. The idea is to capture frames at much higher frame rates than the standard frame rate, process the high frame rate data on chip, and output the video sequence and the application specific data at standard frame rate. In the first part of the dissertation we discuss two applications of this idea. The first is optical flow estimation, which is the basis for many video applications. We present a method for obtaining high accuracy optical flow estimates at a standard

Most of today's video and digital cameras use CCD image sensors, where the electric charge collected by the photodetector array during exposure time is serially shifted out of the sensor chip resulting in slow readout speed and high power consumption. Recently developed CMOS image sensors, by comparison, are read out non-destructively and in a manner similar to a digital memory and can thus be operated at very high frame rates. A CMOS image sensor can also be integrated with other camera functions on the same chip ultimately leading to a single-chip digital camera with very compact size, low power consumption and additional functionality. CMOS image sensors, however, generally su#er from lower dynamic range than CCDs due to their high read noise and non-uniformity. Moreover, as sensor design follows CMOS technology scaling, well capacity will continue to decrease, eventually resulting in unacceptably low SNR.