A CMOS 64 # 64 pixel area image sensor chip using Sigma-Delta modulation at each pixel for A#D conversion is described. The image data output is digital. The chip was fabricated using a 1.2#mtwo layer metal single layer poly n-well CMOS process. Each pixel block consists of a phototransistor and 22 MOS transistors. Test results demonstrate a dynamic range potentially greater than 93dB, a signal to noise ratio #SNR# of up to 61dB, and dissipation of less than 1mW with a 5V power supply. 1 Boyd Fowler, Abbas El Gamal, and David X. D. Yang 2 Charge-coupled devices #CCD# are at present the most widely used technology for implementing area image sensors. CCD image sensors have their shortcomings, however. They su#er from low yields, they consume too muchpower #3#, and they are plagued with SNR limitations due to the shifting and detection of analog charge packets, and the fact that data is communicated o# chip in analog form. Several alternatives to CCD area image sensors that use st...

A set of test structures designed to characterize and compare the performance of CMOS passive and active pixel image sensors is presented. The test structures are designed so that they can be rapidly ported from one process to another. They are also designed so that individual photodetectors and pixel circuits as well as entire image sensor arrays can be characterized and compared based on: quantum e#ciency, spectral response, #xed pattern noise, sensitivity, blooming, input referred read noise, reduction of quantum e#ciency caused by silicide#salicide, lag, digital switching noise sensitivity, impact ionization noise sensitivity, dynamic range, and temperature dependency of all measured parameters. Four test chips that include a variety of these structures have been built in two di#erent 0.35#m CMOS processes. The test chips include nineteen types of individual photodetectors and thirty eighttypes of 64#64 pixel arrays. The test methodology and preliminary test results from these chip...

Abstract—CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development. CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed. I.

This paper presents a multi-resolution generalpurpose high-speed machine vision sensor with on-chip image processing capabilities. The sensor comprises a multi-resolution sensing area, 1536 AD-converters, and a SIMD array of 1536 bit-serial processors with corresponding memory. The SIMD processor array can deliver more than 100 GOPS sustained and the on-chip pixel-analyzing rate can be as high as 4 Gpixels/s. Experimental results showing low noise and a good digital to analogue noise isolation are shown.

Recent advances in CMOS imaging technology, enable the creation of single chip digital cameras. This paper will discuss the basic operation of a CMOS Camera, its key features, and take a brief look at. the rival CCD technology and compare the operational features of the cameras, developed through the use of these technologies. I.