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Integration of MediumThroughput Signal Processing Algorithms on Flexible InstructionSet Architectures
, 1994
"... Integrated circuits in telecommunications and consumer electronics are rapidly evolving towards single chip solutions. New IC architectures are emerging, which combine instructionset processor cores with customised hardware. This paper describes a highlevel synthesis system for integration of re ..."
Abstract

Cited by 6 (4 self)
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Integrated circuits in telecommunications and consumer electronics are rapidly evolving towards single chip solutions. New IC architectures are emerging, which combine instructionset processor cores with customised hardware. This paper describes a highlevel synthesis system for integration of realtime signal processing systems on such processor cores. The compiler supports a flexible architectural model. It can handle certain types of incompletely specified architectures, and offers capabilities for retargetable compilation and architectural exploration. Results for a realistic application from the domain of audio processing indicate the feasibility and power of the presented approach. 1 Introduction The electronic systems industry of the nineties is confronted with the challenge of integrating complex multifunctional systems in silicon. Highvolume markets like enduser telecommunications and consumer electronics require cost efficient solutions in the form of applications...
CoSynthesis of Instruction Sets and Microarchitectures
, 1994
"... The design of an instruction set processor includes several related design tasks: instruction set design, microarchitecture design, and code generation. Although there have been automatic approaches for each individual task, the investigation of the interaction between these tasks still primarily re ..."
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Cited by 5 (1 self)
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The design of an instruction set processor includes several related design tasks: instruction set design, microarchitecture design, and code generation. Although there have been automatic approaches for each individual task, the investigation of the interaction between these tasks still primarily relies on designers' experience and ingenuity. It is thus the goal of this research to develop formal models and algorithms to investigate such interaction systematically. This dissertation presents a twophase cosynthesis approach to the problem. In the architectural level, given a set of application benchmarks and a pipeline structure, the ASIA (Automatic Synthesis of Instruction set Architecture) design automation system generates an instruction set and allocates hardware resources which best fit the applications, and, at the same time, maps the applications to assembly code with the synthesized instruction set. This approach formulates the codesign problem as a modified scheduling/allocat...
StabilityBased Algorithms for High Level Synthesis of Digital ASICs
, 1999
"... This paper presents new algorithms for the scheduling and allocation phases in highlevel synthesis under time and resource constraints. This is achieved by formulating these problems in terms of Liapunov's stability theorem using a transformation technique between the design space and the dyna ..."
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This paper presents new algorithms for the scheduling and allocation phases in highlevel synthesis under time and resource constraints. This is achieved by formulating these problems in terms of Liapunov's stability theorem using a transformation technique between the design space and the dynamic system space. These algorithms are based on moves in the design space, which correspond to the moves towards the equilibrium point in the dynamic system space. The scheduling algorithm (MFS) takes care of mutually exclusive operations, loop folding, multicycle operations, chained operations and pipelining (structural and functional). The mixed schedulingallocation algorithm (MFSA) can handle all of the above scheduling applications as well as simultaneously performing allocation of functional units, registers and interconnects while minimizing the overall cost.
A Neural Network Based Algorithm for the Scheduling Problem in HighLevel Synthesis
"... This paper presents a new scheduling approach for highlevel synthesis based on a deterministic modified Hopfield model. Our model uses a four dimensional neural network architecture to schedule the operations of a data flow graph (DFG) and maps them to specific functional units. Neural Networkbase ..."
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This paper presents a new scheduling approach for highlevel synthesis based on a deterministic modified Hopfield model. Our model uses a four dimensional neural network architecture to schedule the operations of a data flow graph (DFG) and maps them to specific functional units. Neural Networkbased Scheduling (NNS) is achieved by formulating the scheduling problem in terms of an energy function and by using the motion equation corresponding to the variation of energy. The algorithm searches the scheduling space in parallel and finds the optimal schedule. The main contribution of this work is an efficient parallel scheduling algorithm under time and resource constraints appropriate for implementing on a parallel machine. The algorithm is based on moves in the scheduling space, which correspond to moves towards the equilibrium point (lowest energy state) in the dynamic system space. Neurons' motion equation is the core of this guided movement mechanism and guarantees that the state of ...