Abstract. We describe the development of a constraint logic programming based system, called CPP, which is capable of generating most preferred plans with respect to a user’s preference and evaluate its performance. 1

One critical issue in the design of declarative languages is their memory performance, both in terms of total memory usage and locality in memory accesses. Early studies of Prolog programs have shown the language to have excellent characteristics in this regard. In this work we study the memory performance of two modern Prolog systems through detailed instruction-level simulation. Our work aims at addressing...

Progress in Prolog applications requires ever better performance and scalability from Prolog implementation technology. Most modern Prolog systems are emulator-based. Best performance thus requires both good emulator design and good memory performance. Indeed, Prolog applications can often spend hundreds of megabytes of data, but there is little work on understanding and quantifying the interactions between Prolog programs and the memory architecture of modern computers.

Abstract: Several techniques for implementing Prolog in a efficient manner have been devised since the original interpreter, many of them aimed at achieving more speed. There are two main approaches to efficient Prolog implementation: (1) compilers to bytecode and then interpreting it (emulators) or (2) compilers to native code. Emulators have smaller load/compilation time and are a good solution for their simplicity when speed is not a priority. Compilers are more complex than emulators, and the difference is much more acute if some form of code analysis is performed as part of the compilation, which impacts development time. Generation of low level code promises faster programs at the expense of using more resources during the compilation phase. In our work besides using an mixed execution mode, we design an optimizing compiler that using type feedback profiling, dynamic compilation and dynamic deoptimization for improving the performance of logic programming languages.

SUMMARY: In this paper, we present a new framework for the use of Virtual Reality (VR) in engineering design for configuration applications that, while preserving the natural interaction of traditional VR Systems, support the expression of design knowledge in the Virtual Environment (VE) and the visualisation of the user’s interactions with the configuration. Traditional VR systems support the visual exploration of a design solution but do not assist the user in exploring alternative solutions based on domain knowledge. Extending previous work in the area of Intelligent Virtual Environments (IVEs), we propose an intelligent configuration system based on constraint logic programming (CLP), integrated in a real-time 3D graphic environment. This type of integration facilitates the expression of design knowledge in the VE and enables the user to interactively solve and/or refine a spatial configuration problem. Consequently and in order to demonstrate the viability of our approach, we have implemented an intelligent configuration system in which the user can visually explore configurations, but his interaction with objects of the configuration problem triggers new cycles of constraint propagation from the modified configuration to produce a new compatible solution.

Some complex problems could be tackled more satisfactorily by constraint programming tools if it were possible to state arbitrarily quantified constraints. Real-valued quantified constraints have been considered in the field of mathematical programming for more than fifty years, while discrete (boolean) quantified constraints have recently received attention from the SAT community. No direct connection was made between these two research topics, but both of them recently benefited from constraint propagation technology in some sense. It can be hoped for that constraint-propagation will provide a common framework for these two problems. The purpose of this note...

Abstract Boolean constraints play a fundamental rôle in optimization and constraint satisfaction. The resolution of these constraints has been the subject of intense and successful work during the past decade, and SAT solvers have reached a spectacular maturity. This chapter gives a brief overview of the relevant literature on modern SAT solvers and on the recent efforts to better integrate Boolean reasoning with other constraint satisfaction techniques. As a case study that illustrates the use of SAT and CP we consider an application in computational biology: the task to build gene regulatory networks (GRNs). We report on experiments made on this problem with a combined SAT/CP approach. 1

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