Results 1  10
of
20
A versatile building block: The CMOS differential difference amplifier
 IEEE J. SolidState Circuits
, 1987
"... ..."
An analog VLSI chip for estimating the focus of expansion
 In 1997 ISSCC Digest of Technical Papers
, 1996
"... ..."
(Show Context)
Analysis and Synthesis of Static Translinear Circuits
, 2000
"... This report describes the class of static translinear circuits, which are capable of accurately implementing a wide range of static nonlinear relationships in the current signal domain, such as products, quotients, fixed powerlaw relationships, vector magnitude, and rational functions. After a brie ..."
Abstract

Cited by 3 (1 self)
 Add to MetaCart
This report describes the class of static translinear circuits, which are capable of accurately implementing a wide range of static nonlinear relationships in the current signal domain, such as products, quotients, fixed powerlaw relationships, vector magnitude, and rational functions. After a brief historical account of the emergence of the class of translinear circuits, we examine the representation of information in translinear circuits and systems. Then, we describe the translinear principle and its application to the analysis and synthesis of translinearloop circuits, illustrating the processes with several example circuits. We then describe the operation and implementation of a translinearcircuit primitive called the multipleinput translinear element (MITE). From such elements, we build MITE networks, a class of lowvoltage translinear circuits that is equivalent to the class of translinearloop circuits. We describe intuitively the operation of MITE networks. We also describe how to analyze and synthesize such circuits, illustrating these processes with several example circuits.
Analog CMOS Neural Networks Based on Gilbert . . .
, 1993
"... This paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform incircuit learning, using Gilbert multipliers as a primary circuit component. These include 3m and 1.2m designs for contrastive Hebbian learning, and BeckerHinton net ..."
Abstract

Cited by 2 (1 self)
 Add to MetaCart
This paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform incircuit learning, using Gilbert multipliers as a primary circuit component. These include 3m and 1.2m designs for contrastive Hebbian learning, and BeckerHinton networks (a variation of deltarule learning). In addition, unsupervised learning circuits for competitive learning are presented.
Unsupervised Learning in Analog Networks
, 1993
"... I would like express my thanks to my advisor Professor Howard Card, whose continual enthusiasm, wealth of inspirations, and direction were invaluable in the completion of this thesis. I would also like to thank my friends and colleagues who have been a valuable source of information and assistanc ..."
Abstract

Cited by 1 (1 self)
 Add to MetaCart
(Show Context)
I would like express my thanks to my advisor Professor Howard Card, whose continual enthusiasm, wealth of inspirations, and direction were invaluable in the completion of this thesis. I would also like to thank my friends and colleagues who have been a valuable source of information and assistance throughout my graduate program. Most notably, Bob Pelletier, Dave Blight, Chris Schneider, Bob McLeod, Zaifu Zhang, Martin Meier, Brion Dolenko, Brendan Frey, and Brad Brown. Financial support for this work was received from NSERC, and from Micronet, a Network of Centres of Excellence, and was made possible with equipment loans and fabrication facilities provided through the Canadian Microelectronics Corporation. ACKNOWLEDGEMENTS TABLE OF CONTENTS Chapter 1 Introduction ............................................................................................. 1 Basic Neural Network Theory.................................................................. 2 The Learning Algorit...
A 1V, 1V_pp Input Range, FourQuadrant Analog Multiplier Using NeuronMOS Transistors
, 1999
"... Introduction Analog multi#)MT8K are i#e ortantbui#%RH) blocksi n manysi#708 processi#9 ci#si#9D such as modulati#) ci#a cui#at frequency translati#0 ci#anslat fuzzy controllers and neural networks. Inparti#%)M8H many multi#H)M8H arerequi#KD for development of fuzzy controllers. In the reali#R0%)M o ..."
Abstract

Cited by 1 (0 self)
 Add to MetaCart
Introduction Analog multi#)MT8K are i#e ortantbui#%RH) blocksi n manysi#708 processi#9 ci#si#9D such as modulati#) ci#a cui#at frequency translati#0 ci#anslat fuzzy controllers and neural networks. Inparti#%)M8H many multi#H)M8H arerequi#KD for development of fuzzy controllers. In the reali#R0%)M of defuzzi#M808DH ci#fuzzi (locatedi# the last block of fuzzy controllers), the number of multi#H)M89 i# di#lti#H proporti#KT0 to the number of fuzzy rules [1]. When the productsum composi#)KH i# used as a fuzzy reasoni#D method, the number of multi#0)M8K strongly depends on not only the number of fuzzy rules but also the number of fuzzy vari#79D) [2]. Furthermore, the ci#) cui#) wi## a large i#rge range arerequi#77 because vari #r si#)8D from sensors are treatedi# the fuzzy controllers [1]. From the abovedi#978)MK9% i# i# determi#K9 that lowpower andwi#KTDD7)MKR07R) multi#H)MKR are requi #)8 for development of fuzzy controllerswi#l many fuzzy rules. In other words, the lowpower
LowVoltage LowPower CMOS Analogue Circuits For Gaussian And . . .
, 2003
"... A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35m standard CMOS technology using an equationbased desi ..."
Abstract
 Add to MetaCart
A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35m standard CMOS technology using an equationbased design methodology based on genetic algorithms. Electrical simulations demonstrate that high noise amplitudes together with reasonable bandwidths can be achieved with relatively low power dissipation. Potential applications include selfcalibration and onchip selftesting of videorate analoguetodigital converters.
unknown title
"... paper examines issues in the analog CMOS circuit implementation of the soft competitive neural learning algorithm. Results of simulations based on actual measurements of previously fabricated analog components, primarily CMOS Gilbert multipliers, are presented. These results demonstrate that a gener ..."
Abstract
 Add to MetaCart
(Show Context)
paper examines issues in the analog CMOS circuit implementation of the soft competitive neural learning algorithm. Results of simulations based on actual measurements of previously fabricated analog components, primarily CMOS Gilbert multipliers, are presented. These results demonstrate that a generalized version of the soft competitive learning algorithm is capable of discovering appropriate features in an unsupervised learning mode. At the same time it is also well suited to fabrication in an analog environment, and inherent fabrication variations, such as transistor threshold variation and circuit noise, do not adversely effect the performance of the algorithm on a selected test problem. I.
unknown title
"... paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform incircuit learning, using Gilbert multipliers as a primary circuit component. These include 3μm and 1.2μm designs for contrastive Hebbian learning, and BeckerHinton networ ..."
Abstract
 Add to MetaCart
(Show Context)
paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform incircuit learning, using Gilbert multipliers as a primary circuit component. These include 3μm and 1.2μm designs for contrastive Hebbian learning, and BeckerHinton networks (a variation of deltarule learning). In addition, unsupervised learning circuits for competitive learning are presented. I.