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11
A Versatile Building Block: The CMOS Differential Difference Amplifier
, 1987
"... An extension of the opamp concept featuring two differential inputs is presented. In a closedloop environment this circuit forces two floating voltages to the same value, and thus has many interesting applications in the analog circuit domain. The formal description of such a circuit, its nonideal ..."
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Cited by 9 (0 self)
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An extension of the opamp concept featuring two differential inputs is presented. In a closedloop environment this circuit forces two floating voltages to the same value, and thus has many interesting applications in the analog circuit domain. The formal description of such a circuit, its nonidealities and restrictions are given. A monolithic integration of this differential difference amplifier (DDA) in a doublepoly CMOS technology and the measured characteristics are described. Many applications of this circuit, including a voltage comparator with floating inputs, a voltage inverter without resistors and an instrumentation ampli #er with only two external gain determining resistors are discussed.
An Analog VLSI Chip for Estimating the Focus of Expansion
 In 1997 ISSCC Digest of Technical Papers
, 1996
"... For applications involving the control of moving vehicles, the recovery of relative motion between a camera and its environment is of high utility. This thesis describes the design and testing of a realtime analog vlsi chip which estimates the focus of expansion (foe) from measured timevarying ima ..."
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Cited by 6 (1 self)
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For applications involving the control of moving vehicles, the recovery of relative motion between a camera and its environment is of high utility. This thesis describes the design and testing of a realtime analog vlsi chip which estimates the focus of expansion (foe) from measured timevarying images. Our approach assumes a camera moving through a fixed world with translational velocity; the foe is the projection of the translation vector onto the image plane. This location is the point towards which the camera is moving, and other points appear to be expanding outward from. By way of the camera imaging parameters, the location of the foe gives the direction of 3D translation. The algorithm we use for estimating the foe minimizes the sum of squares of the differences at every pixel between the observed time variation of brightness and the predicted variation given the assumed position of the foe. This minimization is not straightforward, because the relationship between the brightn...
Analog CMOS Neural Networks Based on Gilbert . . .
, 1993
"... This paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform incircuit learning, using Gilbert multipliers as a primary circuit component. These include 3m and 1.2m designs for contrastive Hebbian learning, and BeckerHinton net ..."
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Cited by 2 (1 self)
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This paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform incircuit learning, using Gilbert multipliers as a primary circuit component. These include 3m and 1.2m designs for contrastive Hebbian learning, and BeckerHinton networks (a variation of deltarule learning). In addition, unsupervised learning circuits for competitive learning are presented.
Analysis and Synthesis of Static Translinear Circuits
, 2000
"... This report describes the class of static translinear circuits, which are capable of accurately implementing a wide range of static nonlinear relationships in the current signal domain, such as products, quotients, fixed powerlaw relationships, vector magnitude, and rational functions. After a brie ..."
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Cited by 2 (1 self)
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This report describes the class of static translinear circuits, which are capable of accurately implementing a wide range of static nonlinear relationships in the current signal domain, such as products, quotients, fixed powerlaw relationships, vector magnitude, and rational functions. After a brief historical account of the emergence of the class of translinear circuits, we examine the representation of information in translinear circuits and systems. Then, we describe the translinear principle and its application to the analysis and synthesis of translinearloop circuits, illustrating the processes with several example circuits. We then describe the operation and implementation of a translinearcircuit primitive called the multipleinput translinear element (MITE). From such elements, we build MITE networks, a class of lowvoltage translinear circuits that is equivalent to the class of translinearloop circuits. We describe intuitively the operation of MITE networks. We also describe how to analyze and synthesize such circuits, illustrating these processes with several example circuits.
Unsupervised Learning in Analog Networks
, 1993
"... I would like express my thanks to my advisor Professor Howard Card, whose continual enthusiasm, wealth of inspirations, and direction were invaluable in the completion of this thesis. I would also like to thank my friends and colleagues who have been a valuable source of information and assistanc ..."
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Cited by 1 (1 self)
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I would like express my thanks to my advisor Professor Howard Card, whose continual enthusiasm, wealth of inspirations, and direction were invaluable in the completion of this thesis. I would also like to thank my friends and colleagues who have been a valuable source of information and assistance throughout my graduate program. Most notably, Bob Pelletier, Dave Blight, Chris Schneider, Bob McLeod, Zaifu Zhang, Martin Meier, Brion Dolenko, Brendan Frey, and Brad Brown. Financial support for this work was received from NSERC, and from Micronet, a Network of Centres of Excellence, and was made possible with equipment loans and fabrication facilities provided through the Canadian Microelectronics Corporation. ACKNOWLEDGEMENTS TABLE OF CONTENTS Chapter 1 Introduction ............................................................................................. 1 Basic Neural Network Theory.................................................................. 2 The Learning Algorit...
A 1V, 1V_pp Input Range, FourQuadrant Analog Multiplier Using NeuronMOS Transistors
, 1999
"... Introduction Analog multi#)MT8K are i#e ortantbui#%RH) blocksi n manysi#708 processi#9 ci#si#9D such as modulati#) ci#a cui#at frequency translati#0 ci#anslat fuzzy controllers and neural networks. Inparti#%)M8H many multi#H)M8H arerequi#KD for development of fuzzy controllers. In the reali#R0%)M o ..."
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Cited by 1 (0 self)
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Introduction Analog multi#)MT8K are i#e ortantbui#%RH) blocksi n manysi#708 processi#9 ci#si#9D such as modulati#) ci#a cui#at frequency translati#0 ci#anslat fuzzy controllers and neural networks. Inparti#%)M8H many multi#H)M8H arerequi#KD for development of fuzzy controllers. In the reali#R0%)M of defuzzi#M808DH ci#fuzzi (locatedi# the last block of fuzzy controllers), the number of multi#H)M89 i# di#lti#H proporti#KT0 to the number of fuzzy rules [1]. When the productsum composi#)KH i# used as a fuzzy reasoni#D method, the number of multi#0)M8K strongly depends on not only the number of fuzzy rules but also the number of fuzzy vari#79D) [2]. Furthermore, the ci#) cui#) wi## a large i#rge range arerequi#77 because vari #r si#)8D from sensors are treatedi# the fuzzy controllers [1]. From the abovedi#978)MK9% i# i# determi#K9 that lowpower andwi#KTDD7)MKR07R) multi#H)MKR are requi #)8 for development of fuzzy controllerswi#l many fuzzy rules. In other words, the lowpower
Analog Hardware Tolerance of Soft . . .
, 1994
"... This paper examines issues in the analog CMOS circuit implementation of the soft competitive neural learning algorithm. Results of simulations based on actual measurements of previously fabricated analog components, primarily CMOS Gilbert multipliers, are presented. These results demonstrate that a ..."
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This paper examines issues in the analog CMOS circuit implementation of the soft competitive neural learning algorithm. Results of simulations based on actual measurements of previously fabricated analog components, primarily CMOS Gilbert multipliers, are presented. These results demonstrate that a generalized version of the soft competitive learning algorithm is capable of discovering appropriate features in an unsupervised learning mode. At the same time it is also well suited to fabrication in an analog environment, and inherent fabrication variations, such as transistor threshold variation and circuit noise, do not adversely effect the performance of the algorithm on a selected test problem. I. INTRODUCTION Competitive learning algorithms are of current importance in applications such as vector quantization of speech and images [6] . These techniques may be exploited in the area of data compress for use in multimedia applications. To date much of the research in the area of neu...
TOPIC: A GILBERT CELL MIXER IN CMOS AND BJT TECHNOLOGY1
"... Abstract – This paper describes a doubly balanced Gilbert Cell mixer designed in BJT and CMOS technology to operate within 0 to 5 V. A 100 mv input signal was applied at both RF and LO port at different frequencies and their simulation curves were studied for a multiplier. The design done in BJT was ..."
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Abstract – This paper describes a doubly balanced Gilbert Cell mixer designed in BJT and CMOS technology to operate within 0 to 5 V. A 100 mv input signal was applied at both RF and LO port at different frequencies and their simulation curves were studied for a multiplier. The design done in BJT was taped out for fabrication and the chip on its return from foundry, was tested for its results. A comparison of theoretical and experimental results obtained after fabrication of the FourQuadrant Gilbert cell mixer in 2micron process is made. For CMOS process, Gilbert cell mixer was designed till the layout and was ready for handoff to the foundry. The chip was not fabricated in CMOS technology, but the output results were studied and compared in both BJT and CMOS technology. 1.
LowVoltage LowPower CMOS Analogue Circuits For Gaussian And . . .
, 2003
"... A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35m standard CMOS technology using an equationbased desi ..."
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A CMOS analogue circuit for Gaussian noise generation as well as a novel circuit for transforming Gaussian noise into uniform noise, both designed for operating with a supply voltage of 1.5V, are presented. Both circuits are optimized for a 0.35m standard CMOS technology using an equationbased design methodology based on genetic algorithms. Electrical simulations demonstrate that high noise amplitudes together with reasonable bandwidths can be achieved with relatively low power dissipation. Potential applications include selfcalibration and onchip selftesting of videorate analoguetodigital converters.