This paper presents an analog current-mode VLSI implementation of an unsupervised clustering algorithm. The clustering algorithm is based on the popular ART1 algorithm [1], but has been modified resulting in a more VLSI-friendly algorithm [2], [3] that allows a more efficient hardware implementation with simple circuit operators, little memory requirements, modular chip assembly capability, and higher speed figures. The chip described in this paper implements a network that can cluster 100 binary pixels input patterns into up to 18 different categories. Modular expansibility of the system is directly possible by assembling an NM array of chips without any extra interfacing circuitry, so that the maximum number of clusters is 18M and the maximum number of bits of the input pattern is N100. Pattern classification and learning is performed in 1.8s, which is an equivalent computing power of 4.410 9 connections per second plus connection-updates per second. The chip has been fabricated in...

This paper presents a circuit design technique suitable for the realization of winner-take-all (WTA), maximum (MAX), looser-take-all (LTA), and minimum (MIN) circuits. The technique presented is based on current replication and comparison. Traditional techniques rely on the matching of an N transistors array, where N is the number of system inputs. This implies that when N increases, as the size of the circuit and the distance between transistors will also increase, transistor matching degradation and loss of precision in the overall system performance will result. Furthermore, when multichip systems are required, the transistor matching is even worse and performance is drastically degraded. The technique presented in this paper does not rely on the proper matching of N transistors, but on the precise replication and comparison of currents. This can be performed by current mirrors with a limited number of outputs. Thus, N can increase without degrading the precision, even if the system...

In low power current mode signal processing circuits it is many times required to use current mirrors to replicate and amplify/attenuate current signals, and to clamp the voltage of nodes with high parasitic capacitances so that the smallest currents do not introduce unacceptable delays. The use of tunable active-input current mirrors would meet both requirements. In conventional active input current mirrors stability compensation is required. Furthermore, once stabilized, input current cannot be made arbitrarily small. In this paper we introduce two new active-input current mirrors that clamp their input node to a given voltage. One of them does not require compensation, while the other may require under some circumstances, but for both input current may take any value. The mirrors can operate with their transistors biased in strong inversion, weak inversion or even as CMOS compatible lateral bipolar devices. If biased in weak inversion or as lateral bipolars, the current mirror gain ...

In low power current mode signal processing circuits it is often necessary to use current mirrors to replicate and amplify/attenuate current signals and clamp the voltage of nodes with high parasitic capacitances so that the smallest currents do not introduce unacceptable delays. The use of tunable active-input current mirrors would meet both requirements. In conventional active-input current mirrors, stability compensation is required. Furthermore, once stabilized, the input current cannot be made arbitrarily small. In this paper we introduce two new active-input current mirrors that clamp their input node to a given voltage. One of them does not require compensation, while the other may under some circumstances. However, for both, the input current may take any value. The mirrors can operate with their transistors biased in strong inversion, weak inversion, or even as CMOS compatible lateral bipolar devices. If it is biased in weak inversion or as lateral bipolars, the current mirror...

In this thesis a new signal processing technique is presented. This technique exploits the use of pulses as the signalling mechanism. This Palmo 1 signalling method applied to signal processing is novel, combining the advantages of both digital and analogue techniques. Pulsed signals are robust, inherently low-power, easily regenerated, and easily distributed across and between chips. The Palmo cells used to perform analogue operations on the pulsed signals are compact, fast, simple and programmable.