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Low Voltage Analog Circuit Design Techniques: A Tutorial
, 2000
"... Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such ..."
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Cited by 37 (2 self)
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Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulkdriven, floatinggate, and selfcascode MOSFETs; (iv) basic LV building blocks; (v) multistage frequency compensation topologies; and (vi) fullydifferential and fullybalanced systems.
A 13.5b 1.2V micropower extended counting A/D converter
 IEEE J. SolidState Circuits
, 2001
"... Abstract—This work presents a study of the extended counting technique for a 1.2V micropower voiceband A/D converter. This extended counting technique is a blend of 61 modulation with its high resolution but relatively low speed and algorithmic conversion with its higher speed but lower accuracy. ..."
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Cited by 14 (1 self)
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Abstract—This work presents a study of the extended counting technique for a 1.2V micropower voiceband A/D converter. This extended counting technique is a blend of 61 modulation with its high resolution but relatively low speed and algorithmic conversion with its higher speed but lower accuracy. To achieve this, the converter successively operates first as a firstorder 61 modulator to convert the most significant bits, and then the same hardware is used as an algorithmic converter to convert the remaining least significant bits. An experimental prototype was designed in 0.8 m CMOS. With a 1.2V power supply, it consumes 150 W of power at a 16kHz Nyquist sampling frequency. The measured peak ƒ @x C „rhA was 80 dB and the dynamic range 82 dB. The converter core including the controller and all reconstruction logic occupies about I Q I mmP of chip area. This is considerably less than a complete 61 modulation A/D converter where the digital decimation filter would occupy a significant amount of chip area. Index Terms—Analogtodigital, extended counting, low power, low voltage. I.
A 0.6V 82dB deltasigma audio ADC using switchedRC integrators
 IEEE Journal of SolidState Circuits
, 2005
"... ..."
Sub1v design techniques for highlinearity multistage/pipelined analogtodigital converters
 IEEE Transactions on Circuits and SystemsI
, 2005
"... Abstract—The design of an ultralowvoltage multistage (twostage algorithmic) analogtodigital converter (ADC) employing the opampreset switching technique is described. A highly linear input sampling circuit accommodates truly lowvoltage sampling from external input signal source. A radixbased ..."
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Cited by 7 (3 self)
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Abstract—The design of an ultralowvoltage multistage (twostage algorithmic) analogtodigital converter (ADC) employing the opampreset switching technique is described. A highly linear input sampling circuit accommodates truly lowvoltage sampling from external input signal source. A radixbased digital calibration technique is used to compensate for component mismatches and reduced opamp gain under low supply voltage. The radixbased scheme is based on a halfreference multiplying digitaltoanalog converter structure, where the error sources seen by both the reference and input signal paths are made identical for a given stage. The prototype ADC was fabricated in a 0.18 m CMOS process. The prototype integrated circuit dissipates 9 mW at 0.9V supply with an input signal range of 0.9 V differential. The calibration of the ADC improves the signaltonoiseplusdistortion ratio from 40 to 55 dB and the spuriousfree dynamic range from 47 to 75 dB. Index Terms—Analogtodigital converter (ADC), digital calibration, input sampling circuit, opampreset switching, pseudodifferential, ultralow voltage. I.
Very LowVoltage Fully Differential Amplifier for SwitchedCapacitor Applications
 In Proc. IEEE Int. Symposium on Circuits and Systems
, 2000
"... A fully differential opamp suitable for verylow voltage switchedcapacitor circuits in standard CMOS technologies is introduced. The proposed two stage opamp needs a simple low voltage CMFB switchedcapacitor circuit only for the second stage. Due to the reduced supply voltage, the CMFB circuit is ..."
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Cited by 6 (1 self)
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A fully differential opamp suitable for verylow voltage switchedcapacitor circuits in standard CMOS technologies is introduced. The proposed two stage opamp needs a simple low voltage CMFB switchedcapacitor circuit only for the second stage. Due to the reduced supply voltage, the CMFB circuit is implemented using bootstrapped switches. Minor modifications allow to use chopper stabilization for flicker noise reduction. Two different compensation schemes are discussed and compared using an example for 1V operation of the amplifier.
A 1V 10MHz clockrate 13bit CMOS 16 modulator using unitygainreset opamps
 IEEE J. SolidState Circuits
, 2002
"... Abstract—The problem of lowvoltage operation of switchedcapacitor circuits is discussed, and several solutions based on using unitygainreset of the opamps are proposed. Due to the feedback structure, the opamps do not need to be switched off during the reset phase of the operation, and hence can ..."
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Cited by 4 (4 self)
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Abstract—The problem of lowvoltage operation of switchedcapacitor circuits is discussed, and several solutions based on using unitygainreset of the opamps are proposed. Due to the feedback structure, the opamps do not need to be switched off during the reset phase of the operation, and hence can be clocked at a high rate. A lowvoltage 16 modulator, incorporating pseudodifferential unitygainreset opamps, is described. A test chip, realized in a 0.35 m CMOS process and clocked at 10.24 MHz, provided a dynamic range of 80 dB and a signaltonoise C distortion (SNDR) ratio of 78 dB for a 20kHz signal bandwidth, and a dynamic range of 74 dB and SNDR of 70 dB for a 50kHz bandwidth, with a 1V supply voltage. Index Terms—ADC, chargepump circuits, delta–sigma, low voltage, sigma–delta, switchedcapacitor circuits, switched opamp. I.
1 INVITED PAPER Special Section on Analog Circuits and Related Topics Low Voltage Analog Circuit Design Techniques: A Tutorial
"... Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, su ..."
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Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulkdriven, floatinggate, and selfcascode MOSFETs; (iv) basic LV building blocks; (v) multistage frequency compensation topologies; and (vi) fullydifferential and fullybalanced systems. key words: analog circuits, amplifiers, transistor model, bulkdriven, floatinggate, selfcascode, NGCC frequency compensation, fullydifferential and fullybalanced systems. 1.
Biased BodyDriven Circuit Technique
"... I am submitting herewith a dissertation written by Stephen Christopher Terry entitled ..."
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I am submitting herewith a dissertation written by Stephen Christopher Terry entitled