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Proving Existential Theorems when Importing Results from MDG to HOL
- TPHOLS 2001 SUPPLEMENTAL PROCEEDINGS, INFORMATIC RESEARCH REPORT EDI-INF-RR-0046
, 2001
"... An existential theorem, for the specification or implementation of hardware, states that for any inputs there must exist at least one output which is consistent with it. It is proved to prevent an inconsistent model being produced and it is required to formally import the verification result from on ..."
Abstract
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Cited by 4 (3 self)
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An existential theorem, for the specification or implementation of hardware, states that for any inputs there must exist at least one output which is consistent with it. It is proved to prevent an inconsistent model being produced and it is required to formally import the verification result from one verification system to another system. In this paper
Embedding and Verification of an MDG-HDL Translator in HOL
"... We investigate the verification of a translation phase of the Multiway Decision Graphs (MDG) verification system using the Higher Order Logic (HOL) theorem prover. In this paper, we deeply embed the semantics of a subset of the MDG-HDL language and its Table subset into HOL. We define a set of funct ..."
Abstract
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Cited by 2 (1 self)
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We investigate the verification of a translation phase of the Multiway Decision Graphs (MDG) verification system using the Higher Order Logic (HOL) theorem prover. In this paper, we deeply embed the semantics of a subset of the MDG-HDL language and its Table subset into HOL. We define a set of functions which translate this subset MDG-HDL language to its Table subset. A correctness theorem for this translator, which quantifies over its syntactic structure, has been proved. This theorem states that the semantics of the MDG-HDL program is equivalent to the semantics of its Table subset.
Formally Linking MDG and HOL Based on a Verified MDG System
"... We describe an approach for formally linking a symbolic state enumeration system and a theorem proving system based on a veri ed version of the former. It has been realized using a simpli ed version of the MDG system and the HOL system. Firstly, we have veri ed aspects of correctness of a simp ..."
Abstract
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We describe an approach for formally linking a symbolic state enumeration system and a theorem proving system based on a veri ed version of the former. It has been realized using a simpli ed version of the MDG system and the HOL system. Firstly, we have veri ed aspects of correctness of a simpli ed version of the MDG system. We have made certain that the semantics of a program is preserved in those of its translated form. Secondly, we have provided a formal linkage between the MDG system and the HOL system based on importing theorems. The MDG veri cation results can be formally imported into HOL to form a HOL theorem. Thirdly, we have combined the translator correctness theorems and importing theorems. This allows the MDG veri cation results to be imported in terms of a high level language (MDG-HDL) rather than a low level language. We also summarize a general method to prove existential theorems for the design. The feasibility of this approach is demonstrated in a case study that integrates two applications: hardware veri cation (in MDG) and usability veri cation (in HOL). A single HOL theorem is proved that integrates the two results.

