Contents 1 Introduction 1 1.1 Basic Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1.1 What is a system? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1.2 Complexity in system behaviours . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.1.3 Modelling systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.4 Frameworks for modelling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.5 Properties of systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1.6 Organisational and practical issues in modelling . . . . . . . . . . . . . . . . . . . 5 1.2 Scope of the thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Process algebra frameworks 6 2.1 The basic notions of process algebra . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Describ

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Due to the rapid progress in VLSI technology, the overall complexity of the chip has increased dramatically. There is a simultaneous need for more functions and higher speed in modern VLSI engineering. Therefore, using a minimum amount of extra hardware to meet timing requirements is becoming a major issue in VLSI design. Here, we propose an efficient method for timing optimization using gate resizing. To control the hardware overhead, a minimum (or as small as possible) number of gates are selected for resizing with the aid of a powerful benefit function. To guarantee the performance of timing optimization, a modified version of PODEM [1], called PODEM, ensures that each resized gate is located on at least one critical path. Thus, resizing a gate definitely reduces circuit delay. Simulation results demonstrate that our timing optimization method can efficiently reduce circuit delay with a limited amount of gate resizing. 1 1. Introduction In recent years, semiconductor technology h...

This research applies formal methods in logic, verification, and synthesis to digital design engineering. The work centers on the use of applicative notation for system description and functional algebras for design development. The general goal is to develop a comprehensive methodology for constructing correct hardware

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