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The VLSI implementation and evaluation of area- and energy-efficient streaming media processors (2003)

by B Khailany
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Data-parallel Digital Signal Processors: Algorithm mapping, Architecture scaling and Workload adaptation

by Sridhar Rajagopal, Sridhar Rajagopal, B. Johnson , 2004
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Reconfigurable Stream Processors for Wireless Base-Stations

by Sridhar Rajagopal , 2003
"... The need to support evolving standards, rapid prototyping and fast time-to-market are some of the key reasons for desiring programmability in future wireless base-stations. However, supporting highly complex signal processing algorithms for multiple users at high data rates (in Mbps), requiring bill ..."
Abstract - Cited by 3 (3 self) - Add to MetaCart
The need to support evolving standards, rapid prototyping and fast time-to-market are some of the key reasons for desiring programmability in future wireless base-stations. However, supporting highly complex signal processing algorithms for multiple users at high data rates (in Mbps), requiring billions of operations per second, while providing power efficiency present challenges in attaining that goal. This paper demonstrates the viability of stream processors for physical layer base-station processing by demonstrating a fully loaded 3G base-station for 32 users meeting 128 Kbps/user (rate 1/2 constraint 9 coded data rate) at estimated power consumption of 8.2 W. However, when the system load decreases and the amount of data parallelism reduces, clusters of ALUs in the stream processor remain unutilized and waste power. We provide reconfiguration support in stream processors that allows us to turn off clusters dynamically as the data parallelism reduces. Support is provided to turn off ALUs as well such that only the minimum number of ALUs in active clusters needed to meet performance requirements are scheduled. When the system load changes from a fully loaded 32-user base-station at constraint length 9 to say, a more typical 16 active users at constraint length 7, the power consumption can reduce to 2.23 W with 5.06 W power savings due to frequency scaling and a further 0.91 W due to hardware reconfiguration. Thus, by providing real-time and power efficient support in fully programmable hardware, the architecture and algorithm development for wireless communication systems can be made independent and limited versions of future systems can be deployed which can co-exist with current systems until programmable architecture research rises to meet the challenge.

Improving Power Efficiency in Stream Processors Through Dynamic Cluster Reconfiguration

by Sridhar Rajagopal Wiquest, Sridhar Rajagopal
"... Stream processors support hundreds of functional units in a programmable architecture by clustering functional units and utilizing a bandwidth hierarchy. Clusters are the dominant source of power consumption in stream processors. When the data parallelism falls below the number of clusters, unutiliz ..."
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Stream processors support hundreds of functional units in a programmable architecture by clustering functional units and utilizing a bandwidth hierarchy. Clusters are the dominant source of power consumption in stream processors. When the data parallelism falls below the number of clusters, unutilized clusters can be turned off to save power. This paper improves power efficiency in stream processors by dynamically reconfiguring the number of clusters in a stream processor to match the time varying data parallelism of an application. We explore 3 mechanisms for dynamic reconfiguration: using memory, conditional streams and a multiplexer network. A 32-user wireless basestation is a prime example of a workload that benefits from such reconfiguration. When the number of users supported by the basestation dynamically changes from 32 to 4, the reconfiguration from a 32-cluster stream processor to a 4-cluster stream processor yields 15--85% power savings over and above a stream processor that uses conventional power saving techniques such as dynamic voltage and frequency scaling. The dynamic reconfiguration support extends stream processors from traditional high performance applications to power-sensitive applications in which the data parallelism varies dynamically and falls below the number of clusters.

Workload Adaptation

by Sridhar Rajagopal, Sridhar Rajagopal, B. Johnson
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