Results 1  10
of
11
A Methodology for Hardware Verification Based on Logic Simulation
 Journal of the ACM
, 1991
"... A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits fulfilling the system specification will produce a particular response to a sequence of simulation commands. This style of verification has advantages over other proof methods in being readily a ..."
Abstract

Cited by 37 (4 self)
 Add to MetaCart
(Show Context)
A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits fulfilling the system specification will produce a particular response to a sequence of simulation commands. This style of verification has advantages over other proof methods in being readily automated and requiring less attention on the part of the user to the lowlevel details of the design. It has advantages over other approaches to simulation in providing more reliable results, often at a comparable cost.
Knowledge Representation and Classical Logic
, 2007
"... Mathematical logicians had developed the art of formalizing declarative knowledge long before the advent of the computer age. But they were interested primarily in formalizing mathematics. Because of the important role of nonmathematical knowledge in AI, their emphasis was too narrow from the perspe ..."
Abstract

Cited by 12 (6 self)
 Add to MetaCart
(Show Context)
Mathematical logicians had developed the art of formalizing declarative knowledge long before the advent of the computer age. But they were interested primarily in formalizing mathematics. Because of the important role of nonmathematical knowledge in AI, their emphasis was too narrow from the perspective of knowledge representation, their formal languages were not sufficiently expressive. On the other hand, most logicians were not concerned about the possibility of automated reasoning; from the perspective of knowledge representation, they were often too generous in the choice of syntactic constructs. In spite of these differences, classical mathematical logic has exerted significant influence on knowledge representation research, and it is appropriate to begin this handbook with a discussion of the relationship between these fields. The language of classical logic that is most widely used in the theory of knowledge representation is the language of firstorder (predicate) formulas. These are the formulas that John McCarthy proposed to use for representing declarative knowledge in his advice taker paper [176], and Alan Robinson proposed to prove automatically using resolution [236]. Propositional logic is, of course, the most important subset of firstorder logic; recent
Formal Verification of Memory Circuits by SwitchLevel Simulation
 IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems
, 1991
"... A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits implementing the system specification will produce a particular response to a sequence of simulation commands. Threevalued modeling, where the third state indicates a signal with unknown digital ..."
Abstract

Cited by 11 (5 self)
 Add to MetaCart
(Show Context)
A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits implementing the system specification will produce a particular response to a sequence of simulation commands. Threevalued modeling, where the third state indicates a signal with unknown digital value, can greatly reduce the number of patterns that need to be simulated for complete verification. As an extreme case, an bit randomaccess memory (RAM) can be verified by simulating just log patterns. This approach to verification is fast, requires minimal attention on the part of the user to the circuit details, and can utilize more sophisticated circuit models than other approaches to formal verification. The technique has been applied to a CMOS static RAM design using the COSMOS switchlevel simulator. By simulating many patterns in parallel, a massivelyparallel computer can verify a 4K RAM in under 6 minutes. 1.
Verifying a Static RAM Design by Logic Simulation
 FIFTH MIT CONFERENCE ON ADVANCED RESEARCH IN VLSI
, 1988
"... ..."
Qualitative Modeling of Electrical Circuits
 QR’92: Sixth Int. Workshop on Qualitative Reasoning about Physical Systems
, 1992
"... This paper presents a new model for the qualitative analysis of electrical circuit behaviour. We show that a qualitative representation of electrical resistance provides a good intuitive model of connectivity. Features include an extended qualitative symbol set for current flow and the concepts of p ..."
Abstract

Cited by 7 (0 self)
 Add to MetaCart
(Show Context)
This paper presents a new model for the qualitative analysis of electrical circuit behaviour. We show that a qualitative representation of electrical resistance provides a good intuitive model of connectivity. Features include an extended qualitative symbol set for current flow and the concepts of primary and secondary levels of activity. The algorithm assigns labels to network junctions, finds current paths from source to sink, and can make predictions about the effects of circuit topology changes. 1
Structure and Behaviour in Hardware Verification
 Higher Order Logic Theorem Proving and its applications, 6th International Workshop, HUG ’93, Vancouver, B.C. Canada, number 780 in Lecture
, 1993
"... In this paper we review how hardware has been described in the formal hardware verification community. Recent developments in hardware description are evaluated against the background of the use of hardware description languages, and also in relation to programming languages. The notions of structur ..."
Abstract

Cited by 1 (0 self)
 Add to MetaCart
In this paper we review how hardware has been described in the formal hardware verification community. Recent developments in hardware description are evaluated against the background of the use of hardware description languages, and also in relation to programming languages. The notions of structure and behaviour are crucial to this discussion. 1 Introduction Hardware has long been described using hardware description languages (hdls). More recently, in the field of hardware verification logicbased notations have been used. In this paper we explore how the relationship between the structure and behaviour of circuits has been perceived over time in the formal verification field. The structure of this paper is as follows: we give our view of hdls and simulation prior to the advent of formal methods, then we comment on formal logic methods used to describe and reason about hardware. Connections with conventional programming languages are also explored. Hardware Description Languages an...
A Formal Framework for Modular Synchronous System Design ⋆
"... Abstract. We present the formal framework for a novel approach for specifying and automatically implementing systems such as digital circuits and network protocols. The goal is to reduce the design time and effort required to build correct, efficient, complex systems and to eliminate the need for th ..."
Abstract
 Add to MetaCart
(Show Context)
Abstract. We present the formal framework for a novel approach for specifying and automatically implementing systems such as digital circuits and network protocols. The goal is to reduce the design time and effort required to build correct, efficient, complex systems and to eliminate the need for the designer to deal directly with global synchronization and concurrency issues. Our compiler automatically transforms modular and asynchronous specifications of circuits written in our specification language, into tightly coupled, fully synchronous implementations in synthesizable Verilog. We formally state the correctness theorems and give an outline of the correctness proofs for two of the three main techniques that our compiler implements.
WHAT'S IN A DEEP MODEL? A Characterization of Knowledge Depth in Intelligent Safety Systems *
"... While one can characterize deep and shallow models at a high level of abstraction and contrast their relative merits in a general way, this provides little direction for knowledge engineering. In particular, the field lacks a clear definition of 'knowledge depth ' and lacks guidelines rega ..."
Abstract
 Add to MetaCart
While one can characterize deep and shallow models at a high level of abstraction and contrast their relative merits in a general way, this provides little direction for knowledge engineering. In particular, the field lacks a clear definition of 'knowledge depth ' and lacks guidelines regarding the appropriate depth of models for a given application, in this paper we provide a very simple operational definition of knowledge depth ' and use it to examine the opportunities for varying depth in Intelligent safety systems. The paper illustrates a domainindependent mode of analysis for examining progressively deeper models of expertise, and sketches some domainspecific guidelines for constructing intelligent safety systems. We draw upon examples from the domains of nuclear reactor management, chemical plant control, and management of computer installation operations. 1.