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A Methodology for Hardware Verification Based on Logic Simulation
 Journal of the ACM
, 1991
"... A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits fulfilling the system specification will produce a particular response to a sequence of simulation commands. This style of verification has advantages over other proof methods in being readily a ..."
Abstract

Cited by 37 (5 self)
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A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits fulfilling the system specification will produce a particular response to a sequence of simulation commands. This style of verification has advantages over other proof methods in being readily automated and requiring less attention on the part of the user to the lowlevel details of the design. It has advantages over other approaches to simulation in providing more reliable results, often at a comparable cost.
Formal Verification of Memory Circuits by SwitchLevel Simulation
, 1999
"... A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits implementing the system specification will produce a particular response to a sequence of simulation commands. Threevalued modeling, where the third state X indicates a signal with unknown digi ..."
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Cited by 11 (6 self)
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A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits implementing the system specification will produce a particular response to a sequence of simulation commands. Threevalued modeling, where the third state X indicates a signal with unknown digital value, can greatly reduce the number of patterns that need to be simulated for complete verification. As an extreme case, an N bit randomaccess memory (RAM) can be verified by simulating just O(N log N) patterns. This approach to verification is fast, requires minimal attention on the part of the user to the circuit details, and can utilize more sophisticated circuit models than other approaches to formal verification. The technique has been applied to a CMOS static RAM design using the COSMOS switchlevel simulator. By simulating
Knowledge Representation and Classical Logic
, 2007
"... Mathematical logicians had developed the art of formalizing declarative knowledge long before the advent of the computer age. But they were interested primarily in formalizing mathematics. Because of the important role of nonmathematical knowledge in AI, their emphasis was too narrow from the perspe ..."
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Cited by 11 (4 self)
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Mathematical logicians had developed the art of formalizing declarative knowledge long before the advent of the computer age. But they were interested primarily in formalizing mathematics. Because of the important role of nonmathematical knowledge in AI, their emphasis was too narrow from the perspective of knowledge representation, their formal languages were not sufficiently expressive. On the other hand, most logicians were not concerned about the possibility of automated reasoning; from the perspective of knowledge representation, they were often too generous in the choice of syntactic constructs. In spite of these differences, classical mathematical logic has exerted significant influence on knowledge representation research, and it is appropriate to begin this handbook with a discussion of the relationship between these fields. The language of classical logic that is most widely used in the theory of knowledge representation is the language of firstorder (predicate) formulas. These are the formulas that John McCarthy proposed to use for representing declarative knowledge in his advice taker paper [176], and Alan Robinson proposed to prove automatically using resolution [236]. Propositional logic is, of course, the most important subset of firstorder logic; recent
Verifying a Static RAM Design by Logic Simulation
 FIFTH MIT CONFERENCE ON ADVANCED RESEARCH IN VLSI
, 1988
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Qualitative Modeling of Electrical Circuits
 QR’92: Sixth Int. Workshop on Qualitative Reasoning about Physical Systems
, 1992
"... This paper presents a new model for the qualitative analysis of electrical circuit behaviour. We show that a qualitative representation of electrical resistance provides a good intuitive model of connectivity. Features include an extended qualitative symbol set for current flow and the concepts of p ..."
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Cited by 3 (0 self)
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This paper presents a new model for the qualitative analysis of electrical circuit behaviour. We show that a qualitative representation of electrical resistance provides a good intuitive model of connectivity. Features include an extended qualitative symbol set for current flow and the concepts of primary and secondary levels of activity. The algorithm assigns labels to network junctions, finds current paths from source to sink, and can make predictions about the effects of circuit topology changes. 1