Analog electronic cochlear models need exponentially scaled filters. CMOS Compatible Lateral Bipolar Transistors (CLBTs) can create exponentially scaled currents when biased using a resistive line with a voltage difference between both ends of the line. Since these CLBTs are independent of the CMOS threshold voltage, current sources implemented with CLBTs are much better matched than current sources created with MOS transistors operated in weak inversion. Measurements from integrated test chips are shown to verify the improved matching. 1. INTRODUCTION Since the original publication of the "analog electronic cochlea" by Lyon and Mead in 1988 [1], several other analog VLSI models have been proposed which try to capture more of the details of the biological cochlear function [2],[3],[4]. In spite of the differences in their design, all these models use filters with exponentially decreasing cutoff frequencies. This exponential dependency is generally obtained using a linear decr...

This chapter covers device and circuit aspects of low-power analog CMOS circuit design. The fundamental limits constraining the design of low-power circuits are first recalled with an emphasis on the implications of supply voltage reduction. Biasing MOS transistors at very low current provides new features but requires dedicated models valid in all regions of operation including weak, moderate and strong inversion. Low-current biasing also has a strong influence on noise and matching properties. All these issues are discussed, together with the particular aspects related to passive devices and parasitic effects. The design process has to be supported by efficient and accurate circuit simulation. To this end, the EKV compact MOST model for circuit simulation is shortly presented. The use of the basic concepts such as pinch-off voltage, inversion factor and specific current are highlighted thanks to some very simple but fundamental circuits and to an effective use of the model. New design techniques that are appropriate for low-power and/or low-voltage circuits are presented with an emphasis on the analog floating point technique, the instantaneous companding principle, and their application to filters.

references by means of an additional voltage to current converter [1]. A well known circuit which uses MOSFETs only and one resistor [2] is shown on Fig. 1a. VDD P1 N1 P2 N2 Vsn1 Vgp i1 i2 R Vgn ab VDD VSS P1 P3 N1 N3 P2 N2 N4 Vsn1 Vgn3 Vgp1 i3 i1 i2 P4 i4 Figure 1. CMOS current references. a) Known circuit with resistance. b) New circuit with CMOS transistors only. P-channel MOSFETs P1 and P2 act as a current mirror. The source voltage of N1 is given by V Sn1 = U T ln S N1 S P2 S N2 S P1 (1) where U T =kT/q and S N1 , S N2 , S P1 , S P2 are W/L ratios of the respective MOSFETs. Notice that V Sn1 does not depend upon the current level, as long as N1 and N2 are in weak inversion. Its value is in the ran

We have developed a real-time system to transform an audio signal into several specialized representations of sound. The system uses analog circuit models of biological audition to compute these representations. We report on a speech recognizer that uses this system for feature extraction, and we evaluate the performance of this speech recognition system on a speaker-independent 13-word recognition task. 1. INTRODUCTION Neurophysiologists and psychoacousticans have made fundamental advances in understanding biological audition. Computational models of auditory processing, which allow the quantitative assessment of proposed theories of auditory processing, play an important role in the advancement of auditory science. In addition to serving a scientific function, computational models of audition may find practical application in engineering systems. Human performance in many auditory tasks still exceeds the performance of artificial systems, and the specific characteristics of biologic...

CONTENTS ACKNOWLEDGMENTS ..................................................................................... v LIST OF TABLES................................................................................................ vi LIST OF FIGURES ............................................................................................vii SUMMARY............................................................................................................. x Chapter I. INTRODUCTION .........................................................................1 Chapter II. BACKGROUND AND SYSTEM REQUIREMENT ................7 2.1 Background .....................................................................................7 2.2 System Requirements...................................................................24 Chapter III. A SCALEABLE CMOS CURRENT-MODE PREAMPLIFIER DESIGN AND INTEGRATION...............32 3.1 Introdu

In this paper, a compact low-power (LP) low-voltage (LV) metal--oxide--semiconductor-only (MOS-only) variable gain amplifier (VGA) is introduced. This amplifier based on complementary MOS (CMOS) transistors operating in strong inversion is composed of a pseudo-exponential current-to-voltage converter, analog multiplier, and output stage. The gain of the amplifier is controlled exponentially by a novel wide-range pseudoexponential current-to-voltage converter implemented with two back-to-back connected current mirrors exhibiting superb exponential characteristic. Also, a new LV/LP composite transistor is introduced to increase the input dynamic range of the multiplier. The amplifier is fabricated using a 2-m MOSIS n-well process, and its simulation and measurement results are shown in detail. I. INTRODUCTION A LTHOUGH lower supply voltage directly translates to lower power consumption in digital circuits, a similar conclusion cannot necessarily be drawn for analog circuits. Therefore...

We have designed a process-insensitive preamplifier for an optical receiver, fabricated it in several different minimum feature sizes of standard digital CMOS, and demonstrated design scaleability of this analog integrated circuit design. The same amplifier was fabricated in a 1.2 µm and two different 0.8 µm processes through the MOSIS foundry [1]. The amplifier uses a multi-stage, low-gain-per-stage approach. It has a total of 5 identical cascaded stages. Each stage is essentially a current mirror with a current gain of 3. Three of these preamplifiers have been integrated with a GaAs Metal-Semiconductor-Metal (MSM) photodetector and one with an InGaAs MSM detector by using a thin-film epilayer device separation and bonding technology [2]. This quasi-monolithic front-end of an optical receiver virtually eliminates the parasitics between the photodetector and the silicon CMOS preamplifier. We have demonstrated speed and power dissipation improvement as the minimum feature size of the transistors shrink.

Another simulation was made, with the circuit simulated in the basic form, without enhancement circuits, assuming G,,,/Gds and CgslCgd ratios of 1000, with the biasing and signal current sources assumed as ideal. This is not realistic for the basic structures, but is reasonable when it is assumed that the additional enhancement circuits are present. The result is curve “d”. The same simulation for the alternative realizations resulted in similar curves (not shown). In the simulations, it was assumed that the circuit stabilizes com-pletely between the switching instants. Errors due to signal-dependent clock feedthrough and other nonlinear effects were not considered (these errors are dependent on details of the final implementation). IV. CONCLUSION The direct synthesis of exact SI bilinear simulations of passive filters using second-generation Euler integrators was demonstrated. A!ow-pass filter was used as example, but, as in SC realizations, the method can be extended to all the filter types. Second generation integrators were used due to their superior sensitivity characteristics, and simpler final structure. Comparisons made with alternative real-izations demonstrate that the proposed synthesis method is preferable, at least in the examined case of single-path filters, with unbalanced signals.

Abstract- A current reference with low temperature sensitivity based on a switched-capacitor technique has been developed. The implementation is targeted for a 0.18µ CMOS process. HSPICE simulations using level 49 models valid over a wide temperature range were used to verify the design. The simulation results predict variations of less than 0.029 % over a temperature range of –40 °C to 125 °C.. 1

Two main reasons for variation of current output of current source are temperature dependency and process dependency of output current. Therefore in current references we try to compensate these two major factors. This paper reviews some important current reference in bipolar and CMOS technolgy I.