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Boolean Function Representation and Spectral Characterization Using AND/OR Graphs
- INTEGRATION, The VLSI journal
, 2000
"... Methods based on AND/OR graph representations of Boolean relations provide a promising new way of approaching VLSI CAD design automation problems. AND/OR graphs can represent any Boolean network and they allow for systematic reasoning through the application of the technique of recursive learning ..."
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Methods based on AND/OR graph representations of Boolean relations provide a promising new way of approaching VLSI CAD design automation problems. AND/OR graphs can represent any Boolean network and they allow for systematic reasoning through the application of the technique of recursive learning. An approach to build and analyze AND/OR graphs that makes use of hashing techniques in a way similar to that for modern Decision Diagram (DD) packages is described. Additionally, the problem of extracting spectral information from AND/OR graphs is also examined. Spectral information can be used for many CAD system tasks including synthesis, verification and test vector generation. It is shown that spectral information may be calculated directly from output probabilities and a method for estimating output probabilities from AND/OR graphs is presented. Experimental results regarding the AND/OR graph package efficiency and the extraction of spectral information are provided. 1 Introdu...
Computation of Spectral Information from Logic Netlists
"... Spectral information can be used for many CAD system tasks including synthesis, verification and test vector generation. We analyze the problem of extracting spectral information from Boolean and multi-valued logic netlists. It is shown that spectral information may be calculated directly from outpu ..."
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Spectral information can be used for many CAD system tasks including synthesis, verification and test vector generation. We analyze the problem of extracting spectral information from Boolean and multi-valued logic netlists. It is shown that spectral information may be calculated directly from output probabilities and a method for extracting output probabilities from general graphs is described. As a special case, we consider AND/OR graphs which are a data structure recently proposed as an alternative to decision diagrams. Experimental results are given to demonstrate the efficiency of our approach. 1. Introduction Spectral methods have been suggested as an efficient tool for circuit design in the early 1960s. Recently, they are of growing interest, since methods have been developed that allow for efficient solutions to logic synthesis problems [15, 9]. Spectral transformations are based on a linear transformation of the entire function table in the field of integers. The truth table...
Extracting Spectral Information from AND/OR Representations
"... Spectral information can be used for many CAD system tasks including synthesis, verication and test vector generation. AND/OR graphs are also useful for representing functions in CAD systems since they can oer advantages with respect to storage and representation of incompletely specied relations. W ..."
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Spectral information can be used for many CAD system tasks including synthesis, verication and test vector generation. AND/OR graphs are also useful for representing functions in CAD systems since they can oer advantages with respect to storage and representation of incompletely specied relations. We analyze the problem of extracting spectral information from AND/OR graphs. It is shown that spectral information may be calculated directly from output probabilities and a method for extracting output probabilities from AND/OR graphs is described with experimental results provided. 1 Introduction An ecient method for representing a Boolean function is mandatory for a CAD tool to be practically useful. Although many representations have been used in the past, each type has its' own disadvantages. Recently, the AND/OR decision graph has been proposed for representing functions in CAD tools. An overview of the use of this graph in the digital logic arena is given in [4]. The AND/OR grap...
Error Diagnosis in Sequential Multi-Valued Logic Networks
"... In this paper we present a model for diagnosis of errors in Sequential Multi-Valued Logic Networks (SMVLN). The method allows not only to detect errors in an implementation, but also identifies the fault location. In contrast to many previously presented approaches this model does not consider a spe ..."
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In this paper we present a model for diagnosis of errors in Sequential Multi-Valued Logic Networks (SMVLN). The method allows not only to detect errors in an implementation, but also identifies the fault location. In contrast to many previously presented approaches this model does not consider a specific implementation. Instead the model assumes tests based on the transition behavior of the corresponding MVL Finite State Machine (FSM) on the functional level. We present a method for constructing a minimal cost test based on AND/OR graphs using tests with MV outcomes. The model enables encoding over twovalued circuits as well as consideration of SMVLNs. The new approach provides efficient solution even for large MVL FSMs with up to 50000 states. Experimental results for randomly generated FSMs are given that demonstrate the efficiency of our approach. 1 Introduction Several circuit design methods for Multi-Valued Logic (MVL) have been proposed in the past few years [3, 6]. These new ...

