A discrete-event simulation environment, called GMSim, based on the generalized semi-Markov process (GSMP) framework is described. The tool is completely generic and extendible by Tcl script programming. Application specific components are developed in an objected-oriented setting by C++ programming in combination with M4 macro processing. Components are conveniently integrated by run-time linking. The strong links to the underlying mathematical GSMP description is favorable in two respects. First, qualitative results from a body of theory is readily available. Next, the structured view leads to an efficient implementation.

In the last three decades a considerable amount of research has been pursued in the efficient implementation of the pending event set (PES) associated with discrete-event simulation. The reason is simple: a fast event management has a very crucial impact in the total running time of both sequential and parallel simulations. This report focuses on this problem by studying the empirical performance of a number of solutions to the PES implementation in which we include a complete binary tree described in [26], 1 Introduction The PES is defined as the set of all the events generated during a discrete-event simulation and whose occurrence have not been simulated yet. In order to determine the next event to take place, it is necessary to extract the event with the least time from the PES. We call this operation extract-min. On the other hand, the occurrence of any event during the simulation can produce the insertion of new pending or future events in the PES; insert operation. These two b...

The development of a discrete-event simulation tool, called GMSim, based on the generalized semi-Markov process (GSMP) formalism is described. The GSMP representation comprises both analysis and simulation in a unied framework. This paper focuses on the simulation aspect and how to deal with a combinatorially exploding state space. A compositional GSMP modeling methodology is proposed, which in turn combined with an object-oriented programming approach. A key feature of the resulting tool is the close resemblance with the underlying mathematical structure. This facilitates coherent modeling and also an efficient implementation. The tool is completely generic and extendible by Tcl script programming. Application specific components are developed by C++ programming in combination with M4 macro processing.

this paper we study the performance of the very first tournament based complete binary tree. We focus on discrete-event simulation and our results show that this unknown predecessor of heaps can be a more efficient alternative to the fastest pending event set implementations reported in the literature. We also extend the idea of binary tournaments to a (2; L)-tournament structure which exhibits the property of delaying the processing of events with larger timestamps whilst it keeps similar theoretical performance bounds to the native (2; 1)-structure or CBT. This property can be certainly useful in systems where many pending events are expected to be deleted or rescheduled during the simulation. 2 Tournament trees

The bulk-synchronous parallel (BSP) model of computing has been proposed to enable the development of portable software which achieves scalable performance across diverse parallel architectures. A number of applications of computing science have been demonstrated to be efficiently supported by the BSP model in practice.

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The development of efficient parallel discrete event simulators is hampered by the large number of interrelated factors affecting performance. This problem is made more difficult by the lack of scalable representative models that can be used to analyze optimizations and isolate bottlenecks. This paper proposes a performance and scalabilty analysis framework (PSAF) for parallel discrete event simulators. PSAF is built on a platform-independent workload specification language (WSL). WSL is a language that represents simulation models using a set of fundamental performance-critical parameters. For each simulator under study, a WSL translator generates synthetic platform-specific simulation models that conform to the performance and scalability characteristics specified by the WSL description. Moreover, sets of portable simulation models that explore the effects of the different parameters, individually or collectively, on the execution performance can easily be constructed using the synthetic workload generator (SWG). The SWG automatically generates simulation workloads with different performance properties. In addition, PSAF supports the seamless integration of real simulation models into the workload specification. Thus, a benchmark with both real and synthetically generated models can be built allowing for realistic and thorough exploration of the performance space. The utility of PSAF in determining the boundaries of performance and scalability of simulation environments and models is demonstrated.

: : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 11 CHAPTER 1: Introduction : : : : : : : : : : : : : : : : : : : : : : : : : : : : 12 1.1 Computer Networks : : : : : : : : : : : : : : : : : : : : : : : : : : : : 12 1.2 Congestion : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 15 1.3 Protocols : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 17 1.4 Dissertation Outline : : : : : : : : : : : : : : : : : : : : : : : : : : : 18 CHAPTER 2: Simulator and Visualization Tools : : : : : : : : : : : : : : : : 20 2.1 The x-Kernel : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 20 2.1.1 Protocol Objects : : : : : : : : : : : : : : : : : : : : : : : : 22 2.1.2 Session Objects : : : : : : : : : : : : : : : : : : : : : : : : : 23 2.1.3 Message Objects : : : : : : : : : : : : : : : : : : : : : : : : : 24 2.1.4 Support Routines : : : : : : : : : : : : : : : : : : : : : : : : 24 2.1.5 x-Kernel Modifications to Support the Simulato...

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This paper shows how rather complex SCI topologies might be constructed and simulated using our present SCI simulator. We also present the serial HIC technology developed in the European OMI/HIC project. A HIC network may be used to transport SCI packets, and our new HIC network simulator under development is presented as it is intended to simulate such HIC networks. Keywords--- Scalable Coherent Interface (SCI), Simulations, HIC Technology, Serial links, Topologies I. Introduction N ODES in an SCI topology are designed to form ringlets. However, ringlet structures are sensitive to hardware failures, and their peak load is limited; they are not truly scalable [1]. Having access to switches that enable traffic to be directed from one ringlet to another, one may form rather complex networks from quite small ringlets [2], [3], [4]. Ideally, every sending node in the topology should be capable of connecting to any destination node without blocking. We call this network a crossbar networ...