Gurevich's Abstract State Machines (ASM) constitute a highlevel specification language for a wide range of applications. The existing tool support for ASM---currently including type-checking, simulation and debugging---should be extended to support computer-aided verification, in particular by model checking. In this paper we introduce an interface from our existing tool environment to the model checker SMV, based on a transformation which maps a large subset of ASM into the SMV language. Through a case study we show how model checking the transformed specification can ease the validation process and what can be done to render an ASM system specification feasible for a model checker. 1 Introduction Gurevich's Abstract State Machines (ASM) [6] constitute a simple but powerful method for specifying and modelling software and hardware systems. Existing case studies include specifications of distributed protocols, architectures, embedded systems, programming languages, etc. (see...

We study data-driven Web services provided by Web sites interacting with users or applications. The Web site can access an underlying database, as well as state information updated as the interaction progresses, and receives user input. The structure and contents of Web pages, as well as the actions to be taken, are determined dynamically by querying the underlying database as well as the state and inputs. The properties to be verified concern the sequences of events (inputs, states, and actions) resulting from the interaction, and are expressed in linear or branchingtime temporal logics. The results establish under what conditions automatic verification of such properties is possible and provide the complexity of verification. This brings into play a mix of techniques from logic and automatic verification.

NuSMV specifications ⋆

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State Machine) is a state based language for describing transition systems. MDG (Multiway Decision Graphs) provides symbolic representation of transition systems with support of abstract sorts and functions. We implemented a transformation tool that automatically generates MDG models from ASM specifications, then formal verification techniques provided by the MDG tool, such as model checking or equivalence checking, can be applied on the generated models. We support this work with a case study of an Island Tunnel Controller, which behavior and structure were specified in ASM then using our ASM-MDG tool successfully verified within the MDG tool.

Gurevich's Abstract State Machines (ASMs) are computational models of systems specified in a high level language (ASM-SL). In this paper, we investigate the pros and cons of the automatic verification of ASM models using the ASM-Workbench and its extention ASM-SMV, which supports computer-aided verification by model checking. The results obtained are based on the validation and verification of a design block of a communication chip. We conclude this work by some suggestions on the automated process of verifying ASM models.

We present a model of the security policy for the Web-based Continue [10] conference management tool. The policy model and properties are written as ASM Relational Transducers [14], which we extend with a module system in order to simplify the handling of conflicting updates. We assume prior familiarity with the security policy concerns surrounding Continue. First, we review the ASM Relational Transducer modeling and property language. Then we describe the basic structure of our policy implementation and demonstrate the ability to model useful properties in the original core ASM [7] language. We exploring the use of the unmodified modeling language in a security policy context and describe typical ASM Relational Transducer complexity concerns [14] and how these minimally impact our implementation. Next, we discuss difficulties encountered in representing our policy and properties in the standard ASM language, including our implementation in the appendices. Following the description of adapting ASMs for use in security modeling, we introduce policy modules and a composition operator to overcome the difficulty of programming in the original language known as the consistent update problem. Finally, we describe a reduction from our extended language to the original language, and prove it satisfies our required correctness property.

In this paper, we propose a methodology to integrate the Property Specification Language (PSL) in the verification process of systems designed using Abstract States Machines (ASMs). We provide a complete embedding of PSL in the ASM language AsmL, which allows us to integrate PSL properties as part of the design. For the verification, we propose a technique based on the AsmL tool that translates the code containing both the design and the properties into a finite state machine (FSM) representation. We use the generated FSM to run model checking on an external tool, here SMV. Our approach takes advantage of the AsmL language capabilities to model designs at the system level as well as from the power of the AsmL tool in generating both a C# code and an FSM representation from an AsmL model. We applied our approach on SystemC designs, which are translated into AsmL models. Experimental results on a bus structure case study provided in the SystemC library showed a superiority of our approach to conventional verification.