Results 1  10
of
18
On the Modeling and Verification of a Telecom System Block Using MDGs
, 2000
"... Abstract. In this report, we investigate the ability of MDGs (Multiway Decision Graphs) to carry out a verification process of a large industrial Telecom hardware which is commercialized by PMCSierra Inc. Until recently, the Cambridge Fairisle ATM switch fabric with 4200 equivalent gates was the la ..."
Abstract

Cited by 3 (3 self)
 Add to MetaCart
Abstract. In this report, we investigate the ability of MDGs (Multiway Decision Graphs) to carry out a verification process of a large industrial Telecom hardware which is commercialized by PMCSierra Inc. Until recently, the Cambridge Fairisle ATM switch fabric with 4200 equivalent gates was the largest industrial like design verified with the MDG tools. The design we consider in this study is a Telecom System Block (TSB), called RASE, containing 11400 equivalent gates. For the formal verification, we adopted a hierarchical proof methodology to handle the complexity of the design. We then carried out MDG based equivalence checking as well as model checking. To measure the performance of the MDG verification, we also conducted the verification of the same TSB with Cadence FormalCheck. The experimental results showed that in some state variables and uninterpreted function symbols rather than simply a Boolean modeling as in FormalCheck. 1.
Formal Verification of ASM Designs Using the MDG Tool
 Software Engineering and Formal Methods, IEEE Computer Society
, 2003
"... State Machine) is a state based language for describing transition systems. MDG (Multiway Decision Graphs) provides symbolic representation of transition systems with support of abstract sorts and functions. We implemented a transformation tool that automatically generates MDG models from ASM specif ..."
Abstract

Cited by 3 (2 self)
 Add to MetaCart
(Show Context)
State Machine) is a state based language for describing transition systems. MDG (Multiway Decision Graphs) provides symbolic representation of transition systems with support of abstract sorts and functions. We implemented a transformation tool that automatically generates MDG models from ASM specifications, then formal verification techniques provided by the MDG tool, such as model checking or equivalence checking, can be applied on the generated models. We support this work with a case study of an Island Tunnel Controller, which behavior and structure were specified in ASM then using our ASMMDG tool successfully verified within the MDG tool.
Formal Verification of a SONET Telecom System Block
, 2002
"... In this paper, we describe the formal verification of an industrial hardware design from PMCSierra, Inc. The design under investigation is a Telecom System Block which processes a portion of the SONET (Synchronous Optical Network) line overhead of a received data stream. We adopted a hierarchical m ..."
Abstract

Cited by 2 (2 self)
 Add to MetaCart
In this paper, we describe the formal verification of an industrial hardware design from PMCSierra, Inc. The design under investigation is a Telecom System Block which processes a portion of the SONET (Synchronous Optical Network) line overhead of a received data stream. We adopted a hierarchical modeling and verification approach which follows the natural design hierarchy. The formal specification and verification have been carried out based on MDGs (Multiway Decision Graphs), a new decision diagram subsuming the traditional binary decision diagrams and allowing abstract data and functions. The verification has been performed using both model checking and equivalence checking. To measure the performance...
A High Level Reachability Analysis using Multiway Decision Graph in the HOL Theorem Prover
"... Abstract. In this paper, we provide all the necessary infrastructure to define a high level states exploration approach within the HOL theorem prover. While related work has tackled the same problem by representing primitive BDD operations as inference rules added to the core of the theorem prover, ..."
Abstract

Cited by 1 (1 self)
 Add to MetaCart
(Show Context)
Abstract. In this paper, we provide all the necessary infrastructure to define a high level states exploration approach within the HOL theorem prover. While related work has tackled the same problem by representing primitive BDD operations as inference rules added to the core of the theorem prover, we have based our approach on the Multiway Decision Graphs (MDGs). We define canonic MDGs as wellformed directed formulae in HOL. Then, we formalize the basic MDG operations following a deep embedding approach and we derive the correctness proof for each operation. Finally, a high level reachability analysis is implemented as a tactic that uses our MDG theory within HOL. 1
High Level Reduction Technique for Multiway Decision Graphs Based Model Checking
"... Multiway Decision Graphs (MDGs) represent and manipulate a subset of firstorder logic formulae suitable for model checking of large data path circuits. Due to the presence of abstract variables, existing reduction algorithms that is defined on symbolic model checking with BDD cannot be used with MD ..."
Abstract

Cited by 1 (1 self)
 Add to MetaCart
(Show Context)
Multiway Decision Graphs (MDGs) represent and manipulate a subset of firstorder logic formulae suitable for model checking of large data path circuits. Due to the presence of abstract variables, existing reduction algorithms that is defined on symbolic model checking with BDD cannot be used with MDG. In this paper we propose a technique to construct a reduced MDG model for circuits described at algorithmic level in VHDL. The simplified model can be obtained using a high level symbolic simulator called TheoSim, and by running an appropriate symbolic simulation patterns. Then, the actual proof of a temporal MDG formula will be generated. We support our reduction technique by experimental results executed on benchmark properties. Keywords: Modelchecking, Symbolic Simulation, Behavioral Models 1.
FirstOrder LTL Model Checking Using Mdgs
 Proc. Int’l Symp. Automated Technology for Verification and Analysis
, 2004
"... Abstract. In this paper, we describe a firstorder linear time temporal logic (LTL) model checker based on multiway decision graphs (MDG). We developed a firstorder temporal language, L ..."
Abstract

Cited by 1 (0 self)
 Add to MetaCart
(Show Context)
Abstract. In this paper, we describe a firstorder linear time temporal logic (LTL) model checker based on multiway decision graphs (MDG). We developed a firstorder temporal language, L
LCFstyle for Secure Verification Platform based on Multiway Decision Graphs
"... Abstract. Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking and equivalence checking) or deductive reasoning (theorem proving). Indeed, the combination of the two approaches, states exploration and deductive reasoni ..."
Abstract
 Add to MetaCart
(Show Context)
Abstract. Formal verification of digital systems is achieved, today, using one of two main approaches: states exploration (mainly model checking and equivalence checking) or deductive reasoning (theorem proving). Indeed, the combination of the two approaches, states exploration and deductive reasoning promises to overcome the limitation and to enhance the capabilities of each. A comparison between both categories is discussed in details. In this paper, we are interested in presenting as an example a platform for Multiway Decision Graphs (MDGs) in LCFstyle theorem prover. Based on this platform, many conversions such as the reachability analysis and reduction techniques can be implemented that uses the MDG theory within the HOL theorem prover. The paper also questions the best formalization principle of decision graphs to build such a platform in theorem proving since a set of basic operations are used to efficiently manipulate the decision graphs which constitute the kernel of the model checking algorithms, by describing two alternatives to formalize these decision graphs. Then we contrast between them according to their efficiency, complexity and feasibility. Finally, we hope this paper to serve as an adequate introduction to the concepts involved in formalization and a survey of relevant work. 1
Supporting Abstraction when Model Checking ASM
, 2001
"... Model checking as a method for automatic tool support for verification highly stimulates industry's interests. It is limited, however, with respect to the size of the systems' state space. In earlier work, we developed an interface between the ASM Workbench and the SMV model checker th ..."
Abstract
 Add to MetaCart
Model checking as a method for automatic tool support for verification highly stimulates industry's interests. It is limited, however, with respect to the size of the systems' state space. In earlier work, we developed an interface between the ASM Workbench and the SMV model checker that allows model checking of finite ASM models. In this work, we add a means for abstraction in case the model to be checked is infinite and therefore not feasible for the model checking approach. We facilitate the ASM specification language (ASMSL) with a notion for abstract types and introduce an interface between ASMSL and Multiway Decision Graphs (MDGs). MDGs are capable of representing transition systems with abstract types and functions and provide the functionality necessary for symbolic model checking. Our interface maps abstract ASM models into MDGs in a semantic preserving way. It provides a very simple means for generating abstract models that are infinite but can be checked by a model checker based on MDGs.
Modeling and Formal Verification of the Fairisle ATM Switch Fabric Using MDG's
, 1999
"... In this paper, we present several techniques for modeling and formal verification of the Fairisle asynchronous transfer mode (ATM) switch fabric using multiway decision graphs (MDG's). MDG's represent a new class of decision graphs which subsumes Bryant's reduced ordered binary decisi ..."
Abstract
 Add to MetaCart
(Show Context)
In this paper, we present several techniques for modeling and formal verification of the Fairisle asynchronous transfer mode (ATM) switch fabric using multiway decision graphs (MDG's). MDG's represent a new class of decision graphs which subsumes Bryant's reduced ordered binary decision diagrams (ROBDD's) while accommodating abstract sorts and uninterpreted function symbols. The ATM device we investigated is in use for real applications in the Cambridge University Fairisle network. We modeled and verified the switch fabric at three levels of abstraction: behavior, and register transfer level (RTL) and gate levels. In a first stage, we validated the highlevel specification by checking specific safety properties that reflect the behavior of the fabric in its real operating environment. Using the intermediate abstract RTL model, we hierarchically completed the verification of the original gatelevel implementation of the switch fabric against the behavioral specification. Since MDG's avoid model explosion induced by data values, this work demonstrates the effectiveness of MDGbased verification as an extension of ROBDDbased approaches. All the verifications were carried out automatically in a reasonable amount of CPU time.
Embedding Multiway Decision Graphs in HOL
, 2004
"... While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a verification framework in which we attempt to strike the balance between the expressiveness of theorem proving and the ef ..."
Abstract
 Add to MetaCart
(Show Context)
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a verification framework in which we attempt to strike the balance between the expressiveness of theorem proving and the efficiency and automation of state exploration techniques. To this end, we propose to integrate a layer of checking algorithms based on Multiway Decision Graphs (MDG) in the HOL theorem prover. We embedded the MDG underlying logic in HOL and implemented a platform that provides a set of algorithms allowing the user to develop his/her own stateexploration based application inside HOL. While the verification problem is specified in HOL, the proof is derived by tightly combining the MDG based computations and the theorem prover facilities. We have been able to implement different state exploration techniques within HOL such as MDG reachability analysis, equivalence and model checking.