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11
On BiDecompositions of Logic Functions
 Proc. of IWLS '97, Tahoe City
, 1997
"... A logic function f has a disjoint bidecomposition iff f can be represented as f = h(g 1 (X 1 );g 2 (X 2 )), where X 1 and X 2 are disjoint set of variables, and h is an arbitrary twovariable logic fuction. f has a nondisjoint bidecomposition iff f can be represented as f(X 1 ;X 2 ;x)= h(g 1 (X 1 ..."
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Cited by 18 (4 self)
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A logic function f has a disjoint bidecomposition iff f can be represented as f = h(g 1 (X 1 );g 2 (X 2 )), where X 1 and X 2 are disjoint set of variables, and h is an arbitrary twovariable logic fuction. f has a nondisjoint bidecomposition iff f can be represented as f(X 1 ;X 2 ;x)= h(g 1 (X 1 ;x);g 2 (X 2 ;x)), where x is the common variable. In this paper, weshow a fast method to find bidecompositions. Also, weenumerate the number of functions having bidecompositions. I Introduction Functional decomposition is a basic technique to realize economical networks. If the function f is represented as f(X 1 ;X 2 )=h(g(X 1 );X 2 ), then f can be realized bythe network shown in Fig. 1.1. To find such a decomposition, 1 X 2 X g h f Figure 1.1: A simple disjoint decomposition. 1 X 2 X g h g 1 2 f Figure 1.2: A disjoint bidecomposition. 1 X 2 X g h g 1 2 x f Figure 1.3: A nondisjoint bidecomposition. a decomposition chart with 2 n1 columns and 2 n2 rows a...
Algorithmic Aspects of Symbolic Switch Network Analysis
 IEEE Trans. CAD/IC
, 1987
"... A network of switches controlled by Boolean variables can be represented as a system of Boolean equations. The solution of this system gives a symbolic description of the conducting paths in the network. Gaussian elimination provides an efficient technique for solving sparse systems of Boolean eq ..."
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Cited by 16 (5 self)
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A network of switches controlled by Boolean variables can be represented as a system of Boolean equations. The solution of this system gives a symbolic description of the conducting paths in the network. Gaussian elimination provides an efficient technique for solving sparse systems of Boolean equations. For the class of networks that arise when analyzing digital metaloxide semiconductor (MOS) circuits, a simple pivot selection rule guarantees that most s switch networks encountered in practice can be solved with O(s) operations. When represented by a directed acyclic graph, the set of Boolean formulas generated by the analysis has total size bounded by the number of operations required by the Gaussian elimination. This paper presents the mathematical basis for systems of Boolean equations, their solution by Gaussian elimination, and data structures and algorithms for representing and manipulating Boolean formulas.
A Heuristic Algorithm to Design ANDOREXOR ThreeLevel Networks
 Proc. Asia and South Pacific Design Automation Conference
, 1998
"... An ANDOREXOR network, where the output EXOR gate has only two inputs, is one of the simplest threelevel architecture. This network realizes an EXOR of two sumofproducts expressions (EXSOP). In this paper, we show an algorithm to simplify EXSOPs for multipleoutput functions. Our objective is t ..."
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Cited by 14 (4 self)
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An ANDOREXOR network, where the output EXOR gate has only two inputs, is one of the simplest threelevel architecture. This network realizes an EXOR of two sumofproducts expressions (EXSOP). In this paper, we show an algorithm to simplify EXSOPs for multipleoutput functions. Our objective is to minimize the number of distinct products in the sumofproducts expressions of EXSOPs. The algorithm uses a divideandconquer strategy. It recursively applies the Shannon decomposition on a function with more than five variables. The algorithm obtains EXSOPs for the fivevariable functions by using an exact minimization program, then combines those EXSOPs to generate EXSOPs for the functions with more variables. We present experimental results for a set of benchmark functions, and show that EXSOPs require many fewer products and literals than sumofproducts expressions. This is evidence that ANDOREXOR is a powerful architecture to realize many practical logic functions. Index Ter...
Design Methodology for IC Manufacturability Based on Regular LogicBricks
 Proc. 42nd ACM/IEEE Design Automation Conf. (DAC 2005), IEEE
, 2005
"... Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and design cost [2]. Various forms of gate and logic arrays have been recently proposed that can offer such pattern regularity ..."
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Cited by 13 (1 self)
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Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and design cost [2]. Various forms of gate and logic arrays have been recently proposed that can offer such pattern regularity to reduce design risk and costs [2,4,9,11,12]. In this paper, we propose a fullmaskset design methodology which provides the same physical design coherence as a configurable array, but with area and other design benefits comparable to standard cell ASICs. This methodology is based on a set of simple logic primitives that are mapped to a set of logic bricks that are defined by a restrictive set of RET(Resolution Enhancement Technique)friendly geometry patterns. We propose a design methodology to explore tradeoffs between the number of bricks and associated level of configurability versus the required silicon area. Results are shown to compare a design implemented with a small number of regular bricks to an implementation based on a full standard cell library in a 90nm CMOS technology.
A new canonical form for fast Boolean matching in logic synthesis and verification
 in Design Automation Conference
, 2005
"... Abstract – An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for computing the proposed canonical form is provided. The efficiency of the algorithm allows it to be applicable to ..."
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Cited by 12 (0 self)
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Abstract – An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for computing the proposed canonical form is provided. The efficiency of the algorithm allows it to be applicable to large complex Boolean functions with no limitation on the number of input variables as apposed to previous approaches, which are not capable of handling functions with more than seven inputs. Generalized signatures are used to define and compute the canonical form while symmetry of variables is used to minimize the computational complexity of the algorithm. Experimental results demonstrate the efficiency and applicability of the proposed canonical form. I.
Ternary Decision Diagrams Survey
 Proc. ISMVL '97
, 1997
"... This paper surveys seven types of TDDs: General TDD, SOP TDD, ESOP TDD, AND TDD, prime TDD, EXOR TDD, and Kleene TDD. We give new definitions for SOP TDDs and ESOP TDDs and introduce unifying terminology. After showing some theoremsoncomplexities, we compare the sizes of these TDDs using benchmark f ..."
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Cited by 10 (2 self)
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This paper surveys seven types of TDDs: General TDD, SOP TDD, ESOP TDD, AND TDD, prime TDD, EXOR TDD, and Kleene TDD. We give new definitions for SOP TDDs and ESOP TDDs and introduce unifying terminology. After showing some theoremsoncomplexities, we compare the sizes of these TDDs using benchmark functions. Finally, we review important works on TDDs.
Fast Boolean Matching Under Permutation Using Representative
 in Proc. Asia and South Pacific Design Automation Conf
, 1999
"... This paper presents an efficient method to check the equivalence of two Boolean functions under permutation of the variables. The problem is also known as Boolean matching. As a basis of the Boolean matching, we use the notion Prepresentative. If two functions have the same Prepresentative then th ..."
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Cited by 7 (1 self)
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This paper presents an efficient method to check the equivalence of two Boolean functions under permutation of the variables. The problem is also known as Boolean matching. As a basis of the Boolean matching, we use the notion Prepresentative. If two functions have the same Prepresentative then they match. We develop a breadthfirst search technique to quickly compute the Prepresentative. On an ordinary workstation, on the average, our method requires several microseconds to test the Boolean matching for functions with up to eight variables. This approach is promising for Boolean matching of multiplexorbased fieldprogrammable gate arrays (FPGAs) and for library matching with many large cells. Index TermsBoolean matching, technology mapping, variable permutation, Pequivalence. I. INTRODUCTION Boolean matching is a technique to detect the equivalence of two Boolean functions under permutation of the variables. One of the main application of Boolean matching is in celllibrary...
Efficient Computation of Canonical Form for Boolean Matching in Large Libraries
 in Asia and South Pacific Design Automation Conference
, 2004
"... This paper presents an efficient technique for solving a Boolean matching problem in celllibrary binding, where the number of cells in the library is large. As a basis of the Boolean matching, we use the notion NPrepresentative (NPR); two functions have the same NPR if one can be obtained from the ..."
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Cited by 6 (0 self)
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This paper presents an efficient technique for solving a Boolean matching problem in celllibrary binding, where the number of cells in the library is large. As a basis of the Boolean matching, we use the notion NPrepresentative (NPR); two functions have the same NPR if one can be obtained from the other by a permutation and/or complementation(s) of the variables. By using a table lookup and a treebased breadthfirst search strategy, our method quickly computes NPR for a given function. Boolean matching of the given function against the whole library is determined by checking the presence of its NPR in a hash table, which stores NPRs for all the library functions and their complements. The effectiveness of our method is demonstrated through experimental results, which shows that it is more than two orders of magnitude faster than the HinsbergerKolla's algorithmthe fastest Boolean matching algorithm for large libraries.
Arithmetic Ternary Decision Diagrams Applications and Complexity
 Proceedings of the Fourth International Workshop on Applications of the ReedMuller Expansion in Circuit Design, (ReedMuller 99
, 1999
"... In a binary decision diagram (BDD), a nonterminal node representing a function f =xf 0 xf 1 has two edges for f 0 and f 1 . In the arithmetic ternary decision diagram (Arith TDD), each nonterminal node has three edges, where the third edge denotes f 2 = f 0 + f 1 , and + is an integer addition. T ..."
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Cited by 1 (0 self)
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In a binary decision diagram (BDD), a nonterminal node representing a function f =xf 0 xf 1 has two edges for f 0 and f 1 . In the arithmetic ternary decision diagram (Arith TDD), each nonterminal node has three edges, where the third edge denotes f 2 = f 0 + f 1 , and + is an integer addition. The Arith TDD represents the extended weight function, an integer function showing the numbers of true minterms in the cubes. The Arith TDD is useful to detect functional decompositions, prime implicants and prime implicates. Experimental results compare the sizes of BDDs and various TDDs for benchmark functions. I. Introduction A binary decision diagram (BDD) represents a twovalued logic function f.Letf =xf 0 xf 1 be the Shannon expansion of f with respect to variable x. Then, the subgraphs of the BDD represent f 0 and f 1 , as shown in Fig. 1.1. Note that a path in the BDD from the root node to a terminal node represents an assignment of values to the variables. The value of the termina...
The Case for a Balanced Decomposition Process
 12TH EUROMICRO CONFERENCE ON DIGITAL SYSTEMS DESIGN (DSD'09), PATRAS (GREECE)
, 2009
"... Abstract—We present experiments with synthesis tools using examples which are currently believed to be very hard, namely the LEKU examples by Cong and Minkovich and parity examples of our construction. In both cases, we found a way to produce reasonable results with existing tools. We identify the a ..."
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Abstract—We present experiments with synthesis tools using examples which are currently believed to be very hard, namely the LEKU examples by Cong and Minkovich and parity examples of our construction. In both cases, we found a way to produce reasonable results with existing tools. We identify the abilities that are crucial for achieving such results, and also generalize them to avoid similar cases of poor performance in future tools. I.