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35
Analysis, Design, and Optimization of Spiral Inductors and Transformers for Si RF IC's
 IEEE J. SolidState Circuits
, 1998
"... Silicon integrated circuit spiral inductors and transformers are analyzed using electromagnetic analysis. With appropriate approximations, the calculations are reduced to electrostatic and magnetostatic calculations. The important effects of substrate loss are included in the analysis. Classic circu ..."
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Cited by 71 (3 self)
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Silicon integrated circuit spiral inductors and transformers are analyzed using electromagnetic analysis. With appropriate approximations, the calculations are reduced to electrostatic and magnetostatic calculations. The important effects of substrate loss are included in the analysis. Classic circuit analysis and network analysis techniques are used to derive twoport parameters from the circuits. From twoport measurements, loworder, frequencyindependent lumped circuits are used to model the physical behavior over a broadfrequency range. The analysis is applied to traditional square and polygon inductors and transformer structures as well as to multilayer metal structures and coupled inductors. A custom computeraideddesign tool called ASITIC is described, which is used for the analysis, design, and optimization of these structures. Measurements taken over a frequency range from 100 MHz to 5 GHz show good agreement with theory.
A method for reducedorder modeling and simulation of large interconnect circuits and its application to PEEC models with retardation
 IEEE Trans. Circuits Syst. II
, 2000
"... Abstract—The continuous improvement in the performance and the increases in the sizes of VLSI systems make electrical interconnect and package (EIP) design and modeling increasingly more important. Special software tools must be used for the design of highperformance VLSI systems. Furthermore, larg ..."
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Cited by 17 (1 self)
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Abstract—The continuous improvement in the performance and the increases in the sizes of VLSI systems make electrical interconnect and package (EIP) design and modeling increasingly more important. Special software tools must be used for the design of highperformance VLSI systems. Furthermore, larger and faster systems require larger and more accurate circuit models. The partial element equivalent circuit (PEEC) technique is used for modeling such systems with threedimensional full wave models. In this paper, we present a practical, readily parallelizable procedure for generating reducedorder frequencydomain models from general full wave PEEC systems. We use multiple expansion points, and piecemeal construction of poleresidue approximations to transfer functions of the PEEC systems, as was used in the complex frequency hopping algorithms. We consider general, multipleinput/multipleoutput PEEC systems. Our block procedure consists of an outer loop of local approximations to the PEEC system, coupled with an inner loop where an iterative modelreduction method is applied to the local approximations. We systematically divide the complex frequency region of interest into small regions and construct local approximations to the PEEC system in each subregion. The local approximations are constructed so that the matrix factorizations associated with each of them are the size of the original system and independent of the order of the approximation. Results of computations on these local systems are combined to obtain a reducedorder model for the original PEEC system. We demonstrate the usefulness of our approach with three interesting examples. Index Terms—Arnoldi, electronic interconnect package (EIP), interconnect circuits, iterative methods, Lanczos, MIMO systems, model reduction, reduced models, reducedorder systems, PEEC systems, time delays, transfer function. I.
Generating Compact, Guaranteed Passive ReducedOrder Models of 3D RLC Interconnects
, 2004
"... As very large scale integration (VLSI) circuit speeds and density continue to increase, the need to accurately model the effects of threedimensional (3D) interconnects has become essential for reliable chip and system design and verification. Since such models are commonly used inside standard ci ..."
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Cited by 10 (1 self)
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As very large scale integration (VLSI) circuit speeds and density continue to increase, the need to accurately model the effects of threedimensional (3D) interconnects has become essential for reliable chip and system design and verification. Since such models are commonly used inside standard circuit simulators for time or frequency domain computations, it is imperative that they be kept compact without compromising accuracy, and also retain relevant physical properties of the original system, such as passivity. In this paper, we describe an approach to generate accurate, compact, and guaranteed passive models of RLC interconnects and packaging structures. The procedure is based on a partial element equivalent circuit (PEEC)like approach to modeling the impedance of interconnect structures accounting for both the charge accumulation on the surface of conductors and the current traveling in their interior. The resulting formulation, based on nodal or mixed nodal and mesh analysis, enables the application of existing model order reduction techniques. Compactness and passivity of the model are then ensured with a twostep reduction procedure where Krylovsubspace momentmatching methods are followed by a recently proposed, nearly optimal, passive truncated balanced realizationlike algorithm. The proposed approach was used for extracting passive models for several industrial examples, whose accuracy was validated both in the frequency domain as well as against measured timedomain data.
Analysis of eddycurrent losses over conductive substrates with applications to monolithic inductors and transformers
 IEEE Transactions on Microwave Theory and Techniques
, 2001
"... Abstract—In this paper, a closedform integral representation for the eddycurrent losses over a conductive substrate is presented. The results are applicable to monolithic inductors and transformers, especially when such structures are realized over an epitaxial CMOS substrate. The technique is ver ..."
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Cited by 9 (0 self)
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Abstract—In this paper, a closedform integral representation for the eddycurrent losses over a conductive substrate is presented. The results are applicable to monolithic inductors and transformers, especially when such structures are realized over an epitaxial CMOS substrate. The technique is verified against measured results from 100 MHz to 14 GHz for spiral inductors. Index Terms—CMOS substrate losses, eddy currents, monolithic inductors, monolithic transformers, spiral inductors, spiral transformers. I.
PassivityPreserving InterpolationBased Parameterized Macromodeling of Scattered SData
"... Abstract—A new technique to build parametric macromodels based on scattered Sdata samples in the design space is presented. Stability and passivity are guaranteed by construction over the entire design space by a robust and efficient twostep algorithm. In the first step, a set of univariate stable ..."
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Cited by 6 (6 self)
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Abstract—A new technique to build parametric macromodels based on scattered Sdata samples in the design space is presented. Stability and passivity are guaranteed by construction over the entire design space by a robust and efficient twostep algorithm. In the first step, a set of univariate stable and passive macromodels is built. In the second step, a geometrical structure that determines the connections between the scattered data points in the design space is built to perform multivariate positive interpolation. Index Terms—Interpolation, parametric macromodeling, passivity, rational approximation, scattered data. I.
Accurate, rapid, high frequency empirically based predictive modeling of arbitrary geometry planar resistive passive devices
 in IEEE Trans. on Components, Packaging, and Manufacturing Technology, Part B
, 1998
"... Abstract—A novel technique is presented for the high speed, accurate, predictive modeling of arbitrary geometry integrated resistor structures manufactured in a variety of technologies, including those of both multichip modules (MCM’s) and integrated circuits (IC’s). The technique is based upon gene ..."
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Cited by 5 (2 self)
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Abstract—A novel technique is presented for the high speed, accurate, predictive modeling of arbitrary geometry integrated resistor structures manufactured in a variety of technologies, including those of both multichip modules (MCM’s) and integrated circuits (IC’s). The technique is based upon generating test structures in the process of interest, performing measurements, and extracting the behavior of a few key well identified building blocks. These building blocks can then be used for generating circuit models of other any structure created by valid combinations of those building blocks, which can then be simulated in a standard circuit simulator to predict behavior. The procedure has been experimentally verified, and shows good agreement with actual measurements up to 5–10 GHz. In addition, the model validity has been tested in several circuits by comparing the model predicted results against results obtained using the HP MDS simulator which uses measured parameters directly, with very good results. Since lumped element circuits are generated by this method, structure prediction speed is determined by circuit size and simulator small signal analysis time. The method is versatile and is well suited for circuit design applications. Index Terms — Integrated passives, meander, multichip modules, predictive modeling, resistors, scattering parameters, serpentine,
Techniques for Including Dielectrics when Extracting Passive LowOrder Models of High Speed Interconnect
 in Proceedings of the IEEE/ACM International Conference on Computer Aided Design
, 2001
"... Interconnect structures including dielectrics can be modeled by an integral equation method using volume currents and surface charges for the conductors, and volume polarization currents and surface charges for the dielectrics. In this paper we describe a mesh analysis approach for computing the dis ..."
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Cited by 4 (2 self)
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Interconnect structures including dielectrics can be modeled by an integral equation method using volume currents and surface charges for the conductors, and volume polarization currents and surface charges for the dielectrics. In this paper we describe a mesh analysis approach for computing the discretized currents in both the conductors and the dielectrics. We then show that this fully meshbased formulation can be cast into a form using provably positive semidefinite matrices, making for easy application of Krylovsubspace based modelreduction schemes to generate accurate guaranteed passive reducedorder models. Several printed circuit board examples are given to demonstrate the effectiveness of the strategy.
Accurate high speed empirically based predictive modeling of deeply embedded gridded parallel plate capacitors fabricated in a multilayer LTCC process
 IEEE Trans. Comput., Packag., Manufact. Technol
, 1999
"... Abstract — A novel technique is presented for the accurate, rapid, high frequency, predictive modeling of parallel plate capacitors with gridded plates manufactured in a multilayer low temperature cofired ceramic (LTCC) process. The method is empirical in nature and is based on the concept of increm ..."
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Cited by 3 (1 self)
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Abstract — A novel technique is presented for the accurate, rapid, high frequency, predictive modeling of parallel plate capacitors with gridded plates manufactured in a multilayer low temperature cofired ceramic (LTCC) process. The method is empirical in nature and is based on the concept of incrementally constructing the model for a structure from well characterized individual building blocks. Building blocks are characterized by the use of test structures and measurements, and are modeled using passive lumped circuit elements. This method is applied to the predictive modeling of deeply embedded gridded parallel plate capacitor structures. The procedure has been experimentally verified, with accurate predictions of behavior obtained up to the second self resonance for large area gridded parallel plate capacitors. Since lumped element circuits are generated by this method, structure prediction speed is determined by circuit size and simulator small signal analysis time. The method is versatile and is well suited for circuit design applications. Index Terms — Capacitor, circuit models, gridded plane, low temperature cofired ceramic, LTCC, predictive modeling, ƒparameters. I.
Global Modeling of Spatially Distributed Microwave and MillimeterWave Systems
 IEEE Trans. Microwave Theory Tech
, 1999
"... Microwave and millimeterwave systems have generally been developed from a circuit perspective with the effect of the electromagnetic (EM) environment modeled using lumped elements or Nport scattering parameters. The recent development of the local reference node concept coupled with steadystate ..."
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Cited by 3 (1 self)
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Microwave and millimeterwave systems have generally been developed from a circuit perspective with the effect of the electromagnetic (EM) environment modeled using lumped elements or Nport scattering parameters. The recent development of the local reference node concept coupled with steadystate and transient analyses using state variables allows the incorporation of unrestrained EM modeling of microwave structures in a circuit simulator. A strategy implementing global modeling of electrically large microwave systems using the circuit abstraction is presented. This is applied to the modeling of a quasioptical powercombining amplifier. Index Terms Circuit field interaction, circuit theory, electromagnetic analysis, global modeling, method of moments, microwave circuits, nonlinear analysis. I. INTRODUCTION T HE almost overwhelming use of abstraction in electronic engineering has enabled the design of surprisingly complex systems. Electrical engineers are so comfortable with ...