this paper is organized as follows. Section 2 defines the computational environment parameters that were varied in the simulations. Descriptions of the 11 mapping heuristics are found in Section 3. Section 4 examines selected results from the simulation study. A list of implementation parameters and procedures that could be varied for each heuristic is presented in Section 5

s: Jan. 1992 -- Dec. 1994 ffl CTI: Current Technology Index Jan./Feb. 1993 -- Jan./Feb. 1994 ffl DAI: Dissertation Abstracts International: Vol. 53 No. 1 -- Vol. 55 No. 4 (1994) ffl EEA: Electrical & Electronics Abstracts: Jan. 1991 -- Dec. 1994 ffl P: Index to Scientific & Technical Proceedings: Jan. 1986 -- Feb. 1995 (except Nov. 1994) ffl EI A: The Engineering Index Annual: 1987 -- 1992 ffl EI M: The Engineering Index Monthly: Jan. 1993 -- Dec. 1994 The following GA researchers have already kindly supplied their complete autobibliographies and/or proofread references to their papers: Dan Adler, Patrick Argos, Jarmo T. Alander, James E. Baker, Wolfgang Banzhaf, Ralf Bruns, I. L. Bukatova, Thomas Back, Yuval Davidor, Dipankar Dasgupta, Marco Dorigo, Bogdan Filipic, Terence C. Fogarty, David B. Fogel, Toshio Fukuda, Hugo de Garis, Robert C. Glen, David E. Goldberg, Martina Gorges-Schleuter, Jeffrey Horn, Aristides T. Hatjimihail, Mark J. Jakiela, Richard S. Judson, Akihiko Konaga...

Heterogeneous computing (HC) environments are well suited to meet the computational demands of large, diverse groups of tasks (i.e., a meta-task). The problem of mapping (defined as matching and scheduling) these tasks onto the machines of an HC environment has been shown, in general, to be NP-complete, requiring the development of heuristic techniques. Selecting the best heuristic to use in a given environment, however, remains a difficult problem, because comparisons are often clouded by different underlying assumptions in the original studies of each heuristic. Therefore, a collection of eleven heuristics from the literature has been selected, implemented, and analyzed under one set of common assumptions. The eleven heuristics examined are Opportunistic Load Balancing, User-Directed Assignment, Fast Greedy, Min-min, Max-min, Greedy, Genetic Algorithm, Simulated Annealing, Genetic Simulated Annealing, Tabu, and A*. This study provides one even basis for comparison and insights into c...

Most of today's commercial Real-Time Operating Systems (RTOSs) offer multiple scheduling policies which are applied on a per-process basis. The best illustrations of this are the Posix1003.1b compliant OSs that provide two real-time scheduling policies, namely sched_fifo and sched_rr, which under some limited hypotheses are respectively the equivalent of Fixed Priority Pre-emptive (FPP) and Round-Robin (RR). In the field of processor scheduling, schedulability analysis has been extensively studied and the problem of assessing the schedulability of multi-policy systems has been recently addressed in [38]. When FPP and RR are used in conjunction, no optimal priority/policy assignement, such as Audsley's algorithm for FPP [3], is known, a fortiori when other criteria besides feasibility are considered. Because of the size of the solution space, an exhaustive search is not possible; an optimisation technique is required. A schedulability analysis provides valuable help for the application designer but it simply asserts whether a given configuration is feasible or not, in general it does not propose any feasible configurations (1) and, as stated by Gerber and Hong in [23] "it can rarely help to tune the system (2), which is the inevitable next step". To address problems (1) and (2), we propose in this study an approach using a Genetic Algorithm (GA) to best set task priorities and scheduling policies, according to a chosen criterion, on Posix 1003.1b uniprocessor systems. Moreover, it will be shown in this study that the use of RR, in conjunction with FPP, may improve the schedulability as well as the satisfaction of additional application-dependent criteria.

Abstract — Telecommunications are an important symbol of our present information society. With a rapidly growing number of user services, Telecommunications is a field in which many open research lines are challenging the research community. Many of the problems found in this area can be formulated as optimization tasks. Some examples are assigning frequencies in radio link communications, developing error correcting codes for transmission of messages, and designing the telecommunication network. In practice, most of these optimization tasks are unaffordable with exact techniques. Hence, the utilization of heuristic approaches is in order. In this sense, Evolutionary Algorithms have constituted a popular choice. This paper summarizes some applications of the telecommunication field in which Evolutionary Algorithms have been successfully applied. I.

Posix1003.1b compliant operating systems provide two real-time scheduling policies, namely sched_fo and sched_rr, which under some limited hypotheses are respectively the equivalent of Fixed Priority Pre-emptive (FPP) and RoundRobin (RR). In the eld of processor scheduling, schedulability analysis has been extensively studied and the problem of assessing the schedulability of multi-policy systems has been recently addressed. A schedulability analysis provides valuable help for the application designer but it simply asserts whether a given conguration is feasible or not, in general it does not propose any feasible congurations (1) and, as stated by Gerber and Hong "it can rarely help to tune the system (2), which is the inevitable next step". To address problems (1) and (2), we propose in this study an approach using a Genetic Algorithm (GA) to best set task priorities and scheduling policies, according to a chosen criterion, on Posix 1003.1b uniprocessor systems. Moreover, it will be shown that the use of RR, in conjunction with FPP, may improve the schedulability as well as the satisfaction of additional applicationdependant criteria.

We consider the problem of designing error correcting codes (ECC), a hard combinatorial optimization problem of relevance in the field of telecommunications. This problem is tackled here with two related techniques, scatter search and memetic algorithms. The instantiation of these techniques for ECC design will be discussed. Specifically, the design of the local improvement strategy and the combination method will be treated. The empirical evaluation will show that these techniques can dramatically outperform previous approaches to this problem. Among other aspects, the influence of the update method, or the use of path relinking is also analyzed on increasingly large problem instances.

In the near future, there will be many multicast services, and they will be a large part of traffic in the network. The characteristics of multicast connections are quite different from those of point-to-point connections. However, the conventional network topology is designed for point-to-point connection. If we use the conventional network topology for multicast services, the qualities of services will be bad, or the network construction costs will be high. Therefore, it is required to find the topology that is fit for the future network, where both multicast traffic and point-to-point traffic exist. In this paper, the multicast network design methods using heuristic algorithms are proposed for the area assumed to be the lowest layer of the hierarchical network. Regarding the network as a graph, a network design problem is converted into a combinatorial optimization problem. To solve this problem, two heuristic algorithms, which are Greedy and Simulated Annealing, are used. The resu...

Abstract. This paper presents a parallel genetic simulated annealing (PGSA) algorithm that has been developed and applied to optimize continuous problems. In PGSA, the entire population is divided into subpopulations, and in each subpopulation the algorithm uses the local search ability of simulated annealing after crossover and mutation. The best individuals of each subpopulation are migrated to neighboring ones after certain number of epochs. An implementation of the algorithm is discussed and the performance evaluation is made against a standard set of test functions. PGSA shows some remarkable improvement in comparison with the conventional simulated annealing, parallel genetic algorithm. 1

1 Introduction and motivation FPGAs are circuits that can be programmed (and reprogrammed) in the field. Logic functions are typically implemented with look-up tables and flip-flops. The routing between the various blocks is also programmable with the ability to connect the output of virtually any logic block with any other. Through synthesis of a hardware-description language like Verilog or VHDL, user logic is mapped to these logic blocks. After this mapping, it is necessary to make decisions as to the physical location of these logic blocks and which routing resources should be dedicated to which nets. To perform this placement and routing in an optimal manner is a proven NP-complete problem [1]. There are several methods for providing solutions that are acceptable to the designer in a tractable amount of time. Some of these include simulated annealing (SA), forcedirected placement, min-cut placement, placement by numerical optimization, and evolutionbased placement[2]. In this paper, we are mostly concerned with SA, though evolutionary techniques will make a brief appearance.