converter (ADC) achieves high sampling rates with the drawback of additional distortions caused by channel mismatches. In this paper, we consider the dependency of the signal-to-noise-and-distortion ratio (SINAD) on the combination of several different channel mismatch effects. By using either explicitly given mismatch parameters or given parameter distributions, we derive closed-form equations for calculating the explicit or the expected SINAD for an arbitrary number of channels. Furthermore, we extend the explicit SINAD by the impact of timing jitter. We clarify how channel mismatches interact and perform a worst case analysis of the explicit SINAD for individual mismatch errors. We also show that equations describing the expected SINAD of individual mismatch errors are special cases of our general formulation. We indicate how to use the expected SINAD for finding efficient optimization priorities and demonstrate the importance of worst case analyses. Index Terms—Analog-to-digital converter (ADC), channel mismatch, error analysis, signal-to-noise-and-distortion ratio (SINAD), time-interleaving, timing jitter.

This paper presents design algorithms for hybrid filter banks (HFB's) for high-speed, high-resolution conversion between analog and digital signals. The HFB is an unconventional class of filter bank that employs both analog and digital filters. When used in conjunction with an array of slower speed converters, the HFB improves the speed and resolution of the conversion compared with the standard time-interleaved array conversion technique. The analog and digital filters in the HFB must be designed so that they adequately isolate the channels and do not introduce reconstruction errors that limit the resolution of the system. To design continuous-time analog filters for HFB's, a discrete-time-to-continuous-time ("Z-to-S") transform is developed to convert a perfect reconstruction (PR) discrete-time filter bank into a near-PR HFB; a computationally efficient algorithm based on the fast Fourier transform (FFT) is developed to design the digital filters for HFB's. A two-channel HFB is designed with sixth-order continuous-time analog filters and length 64 FIR digital filters that yield 086 dB average aliasing error. To design discrete-time analog filters (e.g., switched-capacitors or charge-coupled devices) for HFB's, a lossless factorization of a PR discrete-time filter bank is used so that reconstruction error is not affected by filter coefficient quantization. A gain normalization technique is developed to maximize the dynamic range in the finite-precision implementation. A four-channel HFB is designed with 9-bit (integer) filter coefficients. With internal aliasing error is 070 dB, and with the equivalent of 20 bits internal precision, maximum aliasing is 0100 dB. The 9-bit filter coefficients degrade the stopband attenuation (compared with unquantized coefficients)...

In this paper, the design procedure and practical issues regarding the realization of time-interleaved oversampling converters are presented. Using the concept of block digital filtering, it is shown that arbitrary 16 topologies can be converted into corresponding time-interleaved structures. Practical issues such as finite opamp gain, mismatching, and dc offsets are addressed, analyzed, and practical solutions to overcome some of these problems are discussed. To verify the theoretical results, a discrete-component prototype of a second-order time-interleaved 16 analog/digital (A/D) converter has been implemented and the design details as well as experimental results are presented. Index Terms---Converters, time-interleaved, oversampling. I. INTRODUCTION O VERSAMPLING converters have become a popular technique for data conversion [1]. One reason for their popularity is their outstanding linearity which comes from the fact that they usually exploit a 1-b quantizer. Even with a tr...

iii ivZusammenfassung Moderne Signalverarbeitungsanwendungen, wie sie in der Nachrichtentechnik und Messtechnik verwendet werden, benötigen sehr schnelle Analog-Digital-Umsetzer (ADU), was durch eine räumlich parallele Anordnung von zeitlich versetzt arbeitenden ADUs (ADU-Array) erreicht werden kann. Die zeitliche Verschiebung ermöglicht, im Vergleich