Results 1 
6 of
6
Modeling of CMOS digitaltoanalog converters for telecommunication,” presented at
 IEEE Int. Symp. Circuits Syst
, 1998
"... Abstract — This paper gives an overview of some of the effects caused by circuit mismatch and parasitics in binary weighted digitaltoanalog (DAC) converters, and, as a special case, a currentsteering CMOS converter. Matlab is used as a behaviorlevel simulator. In telecommunications applications, ..."
Abstract

Cited by 8 (3 self)
 Add to MetaCart
Abstract — This paper gives an overview of some of the effects caused by circuit mismatch and parasitics in binary weighted digitaltoanalog (DAC) converters, and, as a special case, a currentsteering CMOS converter. Matlab is used as a behaviorlevel simulator. In telecommunications applications, the frequencydomain parameters are of the greatest importance. Therefore, the characterization of the device and its performance is determined by frequency parameters such as the signaltonoise ratio, spuriousfree dynamic range, multitone power ratio, etc. In this paper, we show how these frequencydomain parameters are affected when mismatch errors and finite output impedance are applied to a currentsteering CMOS DAC. We discuss how static performance is affected when changing the size of the errors and fundamental circuit parameters. The impact of dynamic errors such as glitches, slewing, and bit skew is discussed. Measurement results from 14bit DAC’s are also shown to illustrate the correlation with the modeling. Index Terms — CMOS, currentsteering, digitaltoanalog converters, dynamic and static errors, frequencydomain measures,
MIDAS  a functional simulator for mixed digital and analog sampled data systems
, 1995
"... Automatic Synthesis of CMOS Digital/Analog Converters by Robert McKinstry Robinson Neff Doctor of Philosophy in Engineering  Electrical Engineering and Computer Sciences University of California at Berkeley Professor Paul R. Gray, Chair Synthesis of analog functional blocks in integrated ci ..."
Abstract

Cited by 6 (1 self)
 Add to MetaCart
Automatic Synthesis of CMOS Digital/Analog Converters by Robert McKinstry Robinson Neff Doctor of Philosophy in Engineering  Electrical Engineering and Computer Sciences University of California at Berkeley Professor Paul R. Gray, Chair Synthesis of analog functional blocks in integrated circuits offers promise for improved designer productivity. By developing module generators for commonly used analog circuit elements, a synthesis methodology may be matched to a particular application, with approaches and algorithms determined by the particular needs of target circuit type. An analog circuit designer should be able to input design specifications and underlying technology information, and a synthesis methodology should determine circuit parameter values and dimensions, creating the required mask layouts. Slow, tedious design and redesign methods should be replaced by one in which the computer finds minimum cost designs which meet performance requirements. This work implements synthesis methods for a widely used analog block, the digital/analog converter (DAC).
A Low Oversampling Ratio 14b 500kHz ADC with a SelfCalibrated Multibit DAC
 IEEE J. SolidState Circuits
, 1996
"... Abstract — Deltasigma (16) analogtodigital converters (ADC’s) rely on oversampling to achieve highresolution. By applying multibit quantization to overcom stability limitations, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500kHz 16 ADC is described t ..."
Abstract

Cited by 3 (0 self)
 Add to MetaCart
Abstract — Deltasigma (16) analogtodigital converters (ADC’s) rely on oversampling to achieve highresolution. By applying multibit quantization to overcom stability limitations, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500kHz 16 ADC is described that uses an oversampling ratio of only 16. A fourthorder embedded modulator, fourbit quantizer, and selfcalibrated digitaltoanalog converter (DAC) are used to achieve this performance. Although the highorder embedded architecture was previously thought to be unstable, it is shown that with proper design, a robust system can be obtained. Circuit design and implementation in a 1.2"m CMOS process are presented. Experimental results give a dynamic range of 84 dB with a sampling rate of 8 MHz and oversampling ratio of 16. This is the lowest oversampling ratio for this resolution and bandwidth achieved to date. I.
A Low Oversampling Ratio 14b 500kHz ΔΣ ADC with a SelfCalibrated Multibit DAC
"... Deltasigma (\Delta\Sigma) analogtodigital converters rely on oversampling technique to achieve highresolution. By overcoming stability limitations and applying multibit quantization, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500 kHz deltasigma ADC ..."
Abstract

Cited by 1 (0 self)
 Add to MetaCart
Deltasigma (\Delta\Sigma) analogtodigital converters rely on oversampling technique to achieve highresolution. By overcoming stability limitations and applying multibit quantization, a circuit topology with greatly reduced oversampling requirements is developed. A 14bit 500 kHz deltasigma ADC is described that uses an oversampling ratio of only 16. A fourthorder embedded modulator, fourbit quantizer, and selfcalibrated DAC are used to achieve this performance. Although the highorder embedded architecture was previously thought to be unstable, it is shown that with proper design a robust system can be obtained. Circuit design and implementation in a 1.2¯m CMOS process are presented. Experimental results give a dynamic range of 84 dB with a sampling rate of 8 MHz and oversampling ratio of 16. This is the lowest oversampling ratio for this resolution and bandwidth achieved to date. 1 Introduction Deltasigma (\Delta\Sigma) analogtodigital converters are well suited for low f...
A SelfCalibration Technique for Monolithic HighResolution D/A Converters
"... Abstract —A selfcalibration teefmique based upon charge storage on the gatesource capacitance of CMOS transistors is presented. The technique can produce multiple copies of a reference current. Therefore, it is suitable for the calibration of highresolution D/A converters wbieh are based upon equ ..."
Abstract
 Add to MetaCart
Abstract —A selfcalibration teefmique based upon charge storage on the gatesource capacitance of CMOS transistors is presented. The technique can produce multiple copies of a reference current. Therefore, it is suitable for the calibration of highresolution D/A converters wbieh are based upon equal current sources. As the storage capacitor is intemaf, no extemaf components are required. A calibrated spare current source is used to aflow continuous converter operation. This impffes that no speciaf calibration cycles are required. To show the capabilities of the caKbration techrdque, it was implemented in a 16bit D\A converter. Measurement results of the converter show a total harmonic distortion of 0.0025 percent at a power consumption of 20 mW and a minimum supply voltage of 3 V. The design was fabricated in a 1.6pm doublemetal CMOS process without special options. I.
Optimizing MOS Transistor Mismatch
 IEEE Journal of SolidState Circuits
, 1998
"... An investigation of MOS transistor mismatch is undertaken and a methodology is developed for optimizing mismatch without increasing layout area. Dramatic improvements of up to 300% in matching can be realized by selecting the optimum W=L ratio without changing the overall WL area product. The theore ..."
Abstract
 Add to MetaCart
An investigation of MOS transistor mismatch is undertaken and a methodology is developed for optimizing mismatch without increasing layout area. Dramatic improvements of up to 300% in matching can be realized by selecting the optimum W=L ratio without changing the overall WL area product. The theoretical basis for the obtainable improvements is fully described and an expression is derived and verified by experiment to predict the W=L ratio which gives optimum matching.