We describe a new method for determining component values and transistor dimensions for CMOS operational ampli ers (op-amps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result the ampli er design problem can be expressed as a special form of optimization problem called geometric programming, for which very e cient global optimization methods have been developed. As a consequence we can e ciently determine globally optimal ampli er designs, or globally optimal trade-o s among competing performance measures such aspower, open-loop gain, and bandwidth. Our method therefore yields completely automated synthesis of (globally) optimal CMOS ampli ers, directly from speci cations. In this paper we apply this method to a speci c, widely used operational ampli er architecture, showing in detail how to formulate the design problem as a geometric program. We compute globally optimal trade-o curves relating performance measures such as power dissipation, unity-gain bandwidth, and open-loop gain. We show how the method can be used to synthesize robust designs, i.e., designs guaranteed to meet the speci cations for a

Analog synthesis tools have failed to migrate into mainstream use primarily because of difficulties in reconciling the simplified models required for synthesis with the industrial-strength simulation environments required for validation. MAELSTROM is a new approach that synthesizes a circuit using the same simulation environment created to validate the circuit. We introduce a novel genetic/ annealing optimizer, and leverage network parallelism to achieve efficient simulator-in-the-loop analog synthesis.

In order to efficiently design complex microelectromechanical systems (MEMS) having large numbers of multi-domain components, a hierarchically structured design approach that is compatible with standard IC design is needed. A graphical-based schematic, or structural, view is presented as a geometrically intuitive way to represent MEMS as a set of interconnected lumpedparameter elements. An initial library focuses on suspended-MEMS technology from which inertial sensors and other mechanical mechanisms can be designed. The schematic representation has a simulation interface enabling the designer to simulate the design at the component level. Synthesis of MEMS cells for common topologies provides the system designer with rapid, optimized component layout and associated macro-models. A synthesis module is developed for the popular folded-flexure micromechanical resonator topology. The algorithm minimizes a combination of total layout area and voltage applied to the electromechanical actuators. Synthesis results clearly show the design limits of behavioral parameters such as resonant frequency for a fixed process technology.

Automatic Synthesis of CMOS Digital/Analog Converters by Robert McKinstry Robinson Neff Doctor of Philosophy in Engineering -- Electrical Engineering and Computer Sciences University of California at Berkeley Professor Paul R. Gray, Chair Synthesis of analog functional blocks in integrated circuits offers promise for improved designer productivity. By developing module generators for commonly used analog circuit elements, a synthesis methodology may be matched to a particular application, with approaches and algorithms determined by the particular needs of target circuit type. An analog circuit designer should be able to input design specifications and underlying technology information, and a synthesis methodology should determine circuit parameter values and dimensions, creating the required mask layouts. Slow, tedious design and redesign methods should be replaced by one in which the computer finds minimum cost designs which meet performance requirements. This work implements synthesis methods for a widely used analog block, the digital/analog converter (DAC).

We are developing physical design tools for surfacemicromachined MEMS, such as polysilicon microstructures built using MCNC’s Multi-User MEMS Process service. Our initial efforts include automation of layout synthesis and behavioral simulation from a MEMS schematic representation. As an example, layout synthesis of a folded-flexure electrostatic combdrive microresonator is demonstrated. Lumpedparameter electromechanical models with two mechanical degrees-of-freedom link the physical and behavioral parameters of the microresonator. Simulated annealing is used to generate global optimized layouts of five different resonators from 3 kHz to 300 kHz starting with mixed-domain behavioral specifications and constraints. Development of the synthesis tool enforces codification of all relevant MEMS design variables and constraints. The synthesis approach allows a rapid exploration of MEMS design issues. 1.