It is increasingly important to structure signal processing algorithms and systems to allow for trading off between the accuracy of results and the utilization of resources in their implementation. In any particular context, there are typically a variety of heuristic approaches to managing these tradeoffs. One of the objectives of this paper is to suggest that there is the potential for developing a more formal approach, including utilizing current research in Computer Science on Approximate Processing and one of its central concepts, Incremental Refinement. Toward this end, we first summarize a number of ideas and approaches to approximate processing as currently being formulated in the computer science community. We then present four examples of signal processing algorithms/systems that are structured with these goals in mind. These examples may be viewed as partial inroads toward the ultimate objective of developing, within the context of signal processing design and implementation,...

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To maximize battery lifetimes of distributed wireless sensors, network protocols and data fusion algorithms should be designed with low power techniques. Network protocols minimize energy by using localized communication and control and by exploiting computation/communication tradeoffs. In addition, data fusion algorithms such as beamforming aggregate data from multiple sources to reduce data redundancy and enhance signal-to-noise ratios, thus further reducing the required communications. We have developed a sensor network system that uses a localized clustering protocol and beamforming data fusion to enable energy-efficient collaboration. We have implemented two beamforming algorithms, the Maximum Power and the Least Mean Squares (LMS) beamforming algorithms, on the StrongARM (SA-1100) processor. Results from our experiments show that the LMS algorithm requires less than one-fifth the energy required by the Maximum Power beamforming algorithm with onlya3dBloss in performa...

We introduce the notion of energy scalable computation on general purpose processors. The principle idea is to maximize computational quality for a given energy constraint. The desirable energy-quality behavior of algorithms is discussed. Subsequently the energy-quality scalability of three distinct categories of commonly used signal processing algorithms (viz. filtering, frequency domain transforms and classification) are analyzed on the StrongARM SA-1100 processor and transformations are described which obtain significant improvements in the energy-quality scalability of the algorithm. I. INTRODUCTION In embedded systems, energy is a precious resource and must be used efficiently. Therefore, it is highly desirable that we structure our algorithms and systems in such a fashion that computational accuracy can be traded off with energy requirement. At the heart of such transformations lies the concept of incremental refinement [1]. Consider the scenario where an individual is using his...

This work describes the implementation of a discrete cosine transform (DCT) core compression system targetted to low-power video (MPEG2 MP@ML) and still-image (JPEG) applications. It exhibits two innovative techniques for arithmetic operation reduction in the DCT computation context along with standard voltage scaling techniques such as pipelining and parallelism. The first method dynamically minimizes the bitwidth of arithmetic operations in the presence of data spatial correlation. The second method trades off power dissipation and image compression quality (arithmetic precision.) The chip dissipates 4.38 mW at 14 MHz and 1.56 V.

Motion estimation has been shown to help significantly in the compression of video sequences. However, since most motion estimation algorithms require a large amount of computation, it is undesirable to use them in power constrained applications, such as battery-operated wireless video encoders. This paper describes a new compression algorithm, termed networkdriven motion estimation (NDME), which reduces the power dissipation of wireless video devices in a networked environment by exploiting the predictability of object motion. Since the location of an object in the current frame can often be predicted accurately from its location in previous frames, it is possible to optimally partition the motion estimation computation between the portable devices and high powered compute servers on the wired network. In network-driven motion estimation, a remote high-powered resource at the base-station (or on the wired network), predicts the motion vectors of the current frame from the motion vectors of the previous frames. The base-station sends these predicted motion vectors to a portable video encoder, where motion compensation proceeds as usual. Network-driven motion estimation adaptively adjusts the coding algorithm based on the amount of motion in the sequence, using motion prediction to code portions of the video sequence which contain a large amount of motion and conditional replenishment to code portions of the sequence which contain little scene motion. This algorithm achieves a reduction in the number of operations performed at the encoder for motion estimation by over two orders of magnitude while introducing minimal degradation to the decoded video compared with full search encoder-based motion estimation.

In this paper, dynamic algorithm transformations (DAT's) for designing low-power reconfigurable signal-processing systems are presented. These transformations minimize energy dissipation while maintaining a specified level of mean squared error or signal-to-noise ratio. This is achieved by modeling the nonstationarities in the input as temporal/spatial transitions between states in the input state--space. The reconfigurable hardware fabric is characterized by its configuration state--space. The configurable parameters are taken to be the filter taps, coefficient and data precisions, and supply voltage Vdd . An energy-optimal reconfiguration strategy is derived as a mapping from the input to the configuration state--space. In this strategy, taps are powered down starting with the tap with the smallest value of [w 2 k =Em(wk )] (where wk and Em(wk ) are, respectively, the coefficient and energy dissipation of the kth tap). Optimal values for precisions and supply voltage Vdd are subsequently computed from the roundoff error and critical path delay requirements, respectively. The DAT-based adaptive filter is employed as a nearend crosstalk (NEXT) canceller in a 155.52-Mb/s asynchronous transfer mode--local area network transceiver over category-3 wiring. Simulation results indicate that the energy savings range from 02% to 87% as the cable length varies from 110 to 40 m, respectively, with an average savings of 69%. An average savings of 62% is achieved for the case where the supply voltage Vdd is kept fixed.

We introduce the notion of energy-scalable systemdesign. The principal idea is to maximize computational quality for a given energy constraint at all levels of the system hierarchy. The desirable energy-quality (E--Q) characteristics of systems are discussed. E--Q behavior of algorithms is considered and transforms that significantly improve scalability are analyzed using three distinct categories of commonly used signal-processing algorithms on the StrongARM SA-1100 processor as examples (viz., filtering, frequency domain transforms and classification). Scalability hooks in hardware are analyzed using similar examples on the Pentium III processor and a scalable programming methodology is proposed. Design techniques for true energy scalable hardware are also demonstrated using filtering as an example.

Abstract—A recent trend in low-power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs can trade off power and arithmetic precision as system requirements change. This work explores the potential of distributed arithmetic (DA) computation structures for low-power precision-on-demand computation. We present an ultralow-power DSP which uses variable precision arithmetic, low-voltage circuits, and conditional clocks to implement a biomedical detection and classification algorithm using only 560 nW. Low energy consumption enables self-powered operation using ambient mechanical vibrations, converted to electric energy by a MEMS transducer and accompanying power electronics. The MEMS energy scavenging system is estimated to deliver 4.3 to 5.6 W of power to the DSP load. Index Terms—Digital signal processing (DSP), distributed arithmetic, energy scavenging, low power. I.

Presented in this paper are algorithm transformation techniques for adaptive signal processing, which allow dynamic alteration of algorithm properties in response to signal nonstationarities. These transformations, referred to as dynamic algorithm transformations (DAT), jointly optimize algorithm and circuit performance measures such as signal-to-noise ratios (SNR) and power dissipation (PD ), respectively. A DAT-based signal processing system is composed of a signal monitoring algorithm (SMA) block and a signal processing algorithm (SPA) block. First, computation of the theoretical power-optimum SPA configuration incorporating signal transition activity is presented. Next, practical SMA schemes are developed, which achieved power reduction by a combination of powering down the filter taps and modifying the coefficients. The DAT-based adaptive filter is then employed as a near-end cross-talk (NEXT) canceller in 155:52 Mb=s ATM-LAN over category 3 wiring. Simulation results indicate tha...