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Model Checking via Reachability Testing for Timed Automata
, 1997
"... In this paper we develop an approach to model-checking for timed automata via reachability testing. As our specification formalism, we consider a dense-time logic with clocks. This logic may be used to express safety and bounded liveness properties of real-time systems. We show how to automatically ..."
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Cited by 38 (13 self)
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In this paper we develop an approach to model-checking for timed automata via reachability testing. As our specification formalism, we consider a dense-time logic with clocks. This logic may be used to express safety and bounded liveness properties of real-time systems. We show how to automatically synthesize, for every logical formula ', a socalled test automaton T' in such a way that checking whether a system S satisfies the property ' can be reduced to a reachability question over the system obtained by making T' interact with S.
Verification of Logic Controllers for Continuous Plants Using Timed Condition/Event-System Models
- Automatica
, 1999
"... An approach to the formal verification of logic controllers for processes with switched continuous dynamics is presented. The method builds on modular, timed discrete event models of the plant and the controller. Subsystems with continuous dynamics are approximated algorithmically. The formal verifi ..."
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Cited by 9 (5 self)
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An approach to the formal verification of logic controllers for processes with switched continuous dynamics is presented. The method builds on modular, timed discrete event models of the plant and the controller. Subsystems with continuous dynamics are approximated algorithmically. The formal verification consists of determining the reachable discrete states of the resulting model and comparing it to a set of undesired states. For this purpose, the tool HyTech is applied. The approach is illustrated by the treatment of a process engineering example. 1 Portions of this paper were presented at the 13th IFAC World Congress, San Francisco, USA, 1996, in (Kowalewski and Preuig, 1996b) 2 Process Control Laboratory, Chemical Engineering Department, University of Dortmund, D-44221 Dortmund, Germany. Corresponding author S. Kowalewski. Tel. +49 231 755 5128; Fax +49 231 755 5129; Email s.kowalewski@ct.uni-dortmund.de 2 1 INTRODUCTION This contribution deals with the problem of analyzing th...
Smaller Abstractions for ∀CTL ∗ without Next ⋆
"... Abstract. The success of applying model-checking to large systems depends crucially on the choice of good abstractions. In this work we present an approach for constructing abstractions when checking Nextfree universal CTL ∗ properties. It is known that functional abstractions are safe and that Next ..."
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Abstract. The success of applying model-checking to large systems depends crucially on the choice of good abstractions. In this work we present an approach for constructing abstractions when checking Nextfree universal CTL ∗ properties. It is known that functional abstractions are safe and that Next-free universal CTL ∗ is insensitive to finite stuttering. We exploit these results by introducing a safe Next-free abstraction that is typically smaller than the usual functional one while at the same time more precise, i.e., it has less spurious counter-examples. 1

