. An approach, called SAT (Stages And Transformations), is introduced to support the derivation of parallel distributed-memory programs. During the design, a program is viewed as a single thread of stages, with parallelism concentrated within stages; the target program is of the SPMD format. The design process is based on the transformation rules of the Bird-Meertens formalism of higher-order functions over lists. The approach is illustrated by three case studies which include: a systematic method of constructing list homomorphisms, a scalable, load-balanced implementation of divide-and-conquer based on a specialized topology and a formal derivation of a time and cost optimal parallel algorithm for straightforward polynomial multiplication. 1 Introduction The main problem with parallel and distributed systems today seems not to be how to build them, but how to make them work efficiently. The enormous diversity of architectures, together with the specific problems of parallelism, not e...

Modern parallel processing machines are becoming more scalable through advances in network technology. It is now important to have a scalable computational model to support the design and analysis of algorithms.

ion with Performance 2 by D M Goodeve 3 , S A Dobson 4 , J M Nash, J R Davy, P M Dew, M Kara & C P Wadsworth 5 April 1997 1 The work reported in this paper was supported by the UK Engineering and Physical Sciences Research Council under the project `TallShiP: High-level sharing for parallel programming'. 2 This paper has been submitted for publication in Journal of Parallel and Distributed Computing 3 Now at Department of Computer Science, University of York, York, North Yorkshire, Y01 5DD, UK 4 Well-founded Systems Unit, CLRC Rutherford Appleton Laboratory, Chilton, Didcot, Oxfordshire OX11 0QX, UK 5 Formerly at CLRC Rutherford Appleton Laboratory and now an independent consultant Abstract This paper demonstrates the utility of typed shared data abstractions as an effective high-level means of structuring and coordinating parallel programs. Access to data shared by concurrent processes is expressed through operations of Shared Abstract Data Types (SADTs). SADTs abstr...

ion and Performance in the Design of Parallel Programs Der Fakultat fur Mathematik und Informatik der Universitat Passau vorgelegte Zusammenfassung der Veroffentlichungen zur Erlangung der venia legendi von Dr. Sergei Gorlatch Passau, Juli 1997 Contents 1 Introduction 2 2 Outline of the SAT Approach 6 2.1 Performance View . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Abstraction View . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Design in SAT: Stages and Transformations . . . . . . . . . . 9 2.4 SAT and Homomorphisms . . . . . . . . . . . . . . . . . . . . 11 3 List Homomorphisms 12 4 Extraction and Adjustment 14 4.1 The CS-Method . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 Mechanizing the CS-Method . . . . . . . . . . . . . . . . . . . 17 4.3 Almost-Homomorphisms: the MSS Problem . . . . . . . . . . 19 5 Composition of Homomorphisms 21 5.1 Rules of Composition . . . . . . . . . . . . . . . . . . . . . . . 21 5.2 Derivation by Transformation...

The takeup of parallel computing has been hampered by the lack of portable software. The BSP model allows the design of portable code for regular computations. This paper describes the use of the WPRAM model to support more irregular problems. A shared queue data type is described, which provides predictable and scalable performance characteristics. The queue can be used to structure the sharing of data in a parallel system, resulting in code which is portable and amenable to performance analysis. 1 Introduction In the past, achieving high performance on parallel machines required the programmer to exploit the detailed architectural features of the particular platform. The resulting prevalence of non-portable code has severely limited the growth of the parallel software industry. There has recently been a convergence in the features of a parallel architecture, due to the availability of powerful and cheap commodity processors, and the use of scalable high performance networks. A...

This paper describes highly scalable caching methods for a weakly coherent shared memory model called WPRAM in which explicit synchronisation operations are used to guarantee data coherency. The schemes described here apply to barrier synchronisation and a form of pairwise synchronisation employed by the WPRAM, and the combination of the two. An example of the use of barrier caching method is shown using the simplex method for linear programming. A parallel sorting algorithm is used to demonstrate the combination of barrier and tag caching schemes.