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Simplified Logic for FirstOrder and SecondOrder MismatchShaping DigitaltoAnalog Converters
 AND GALTON: NECESSARY AND SUFFICIENT CONDITIONS FOR MISMATCH SHAPING 759
, 2001
"... Mismatchshaping digitaltoanalog converters (DACs) have become widely used in highperformance deltasigma data converters because they facilitate deltasigma modulators with multibit quantization. Relative to singlebit quantization, multibit quantization significantly relaxes the analog circuit ..."
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Cited by 8 (5 self)
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Mismatchshaping digitaltoanalog converters (DACs) have become widely used in highperformance deltasigma data converters because they facilitate deltasigma modulators with multibit quantization. Relative to singlebit quantization, multibit quantization significantly relaxes the analog circuit performance necessary to achieve a given level of data converter precision, but significant digital logic is required to perform the mismatch shaping. In modern very large scale integration processes optimized for digital circuitry, this tends to be a good tradeoff in terms of both area and power consumption. It is nonetheless desirable to minimize the digital complexity as much as possible. Moreover, in deltasigma analogtodigital converters the mismatchshaping logic is in the feedback path of the deltasigma modulator, so it is essential to maintain a sufficiently small propagation delay through the mismatchshaping logic. This paper presents and analyzes several variations of the switching blocks within a treestructured mismatchshaping DAC that result in the most hardwareefficient firstorder and secondorder mismatch shaping DAC implementations yet known to the authors. The variations presented allow designers to tradeoff complexity for propagationdelay reduction so as to tailor designs to specific applications.
Necessary and Sufficient Conditions for Mismatch Shaping in a General Class of Multibit Dacs
, 2002
"... Multibit digitaltoanalog converters (DACs) are often constructed by combining several 1bit DACs of equal or different weights in parallel. In such DACs, component mismatches give rise to signal dependent error that can be viewed as additive DAC noise. In some cases these DACs use dynamic element ..."
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Cited by 7 (4 self)
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Multibit digitaltoanalog converters (DACs) are often constructed by combining several 1bit DACs of equal or different weights in parallel. In such DACs, component mismatches give rise to signal dependent error that can be viewed as additive DAC noise. In some cases these DACs use dynamic element matching techniques to decorrelate the DAC mismatch noise from the input sequence and suppress its power in certain frequency bands. Such DACs are referred to as mismatchshaping DACs and have been used widely as enabling components in stateoftheart data converters. Several different mismatchshaping DAC topologies have been presented, but theoretical analyses have been scarce and no general unifying theory has been presented in the previously published literature. This paper presents such a unifying theory in the form of necessary and sufficient conditions for a multibit DAC to be a mismatchshaping DAC and applies the conditions to evaluate the DAC noise generated by several of the previously published mismatchshaping DACs and qualitatively compare their behavior.
A Digital CommonMode Rejection Technique for Differential AnalogtoDigital Conversion
, 2001
"... A multibit analogtodigital converter can achieve high resolution with a lower order and lower oversampling ratio than a singlebit design, but it requires a multibit internal flash analogtodigital converter rather than a simple comparator. In an implementation with a fully differential ana ..."
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Cited by 2 (2 self)
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A multibit analogtodigital converter can achieve high resolution with a lower order and lower oversampling ratio than a singlebit design, but it requires a multibit internal flash analogtodigital converter rather than a simple comparator. In an implementation with a fully differential analog front end, the flash analogtodigital converter must quantize a differential voltage relative to a set of differential reference voltages. Though analog techniques for differential analogtodigital conversion exist, implementing them in a lowvoltage singlepoly CMOS process is a challenging circuit design problem. This paper presents a digital commonmode rejection technique for differential analogtodigital conversion (ADC), which avoids the circuit complexity and die area requirements of analog commonmode rejection techniques. This technique was used to implement the internal quantizer in two highperformance singlepoly CMOS ADC prototypes with over 98dB peak signaltonoiseanddistortion ratio and 105dB spuriousfree dynamic range. Implementation details, die area requirements, and measured commonmode rejection are presented for the prototype. Signalprocessing details of digital commonmode rejection within the modulator are presented, showing that injected commonmode noise results only in modulation of the quantization error power and does not create spurious tones.
A tight signalband power bound on mismatch noise in a mismatch shaping digitaltoanalog converter
 IEEE Trans. Inf. Theory
, 2004
"... Abstract—Many applications employ digitaltoanalog converters (DACs) to obtain the advantages of digital processing (e.g., low power and physical size, resilience to noise, etc.) to generate signals, such as voltages, that are analog in nature. Given the appropriate numerical representation of its ..."
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Cited by 2 (2 self)
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Abstract—Many applications employ digitaltoanalog converters (DACs) to obtain the advantages of digital processing (e.g., low power and physical size, resilience to noise, etc.) to generate signals, such as voltages, that are analog in nature. Given the appropriate numerical representation of its input, the DAC ideally behaves as a linear gain element. However, as a result of inevitable component mismatches, the output of a multibit DAC (i.e., a DAC designed to output more than two analog levels) is a nonlinear function of its input. The resulting distortion, called DAC noise, limits the overall signaltonoise ratio (SNR) and hence the obtainable accuracy of the DAC. Mismatchshaping DACs exploit builtin redundancy to suppress the DAC noise in the input signal’s frequency band. Although mismatchshaping DACs are widely used in commercial products, little theory regarding the structure of their DAC noise has been published to date. Consequently, designers have been forced to rely upon simulations to estimate DAC noise power and behavior, which can be misleading because the DAC noise depends on the DAC input. This paper addresses this problem. It presents an analysis of the DAC noise power spectral density (PSD) in a commonly used mismatchshaping DAC: the dithered firstorder lowpass treestructured DAC. This design ensures that its DAC noise has a spectral null at dc (i.e., zero frequency) by generating digital, dcfree sequences using the same techniques that have been developed for line codes. An expression is derived for the DAC noise PSD that depends on the statistics of these sequences and is used to show various properties of the DAC noise. Specifically, an attainable bound is derived for the signalband DAC noise power that can be used to predict worst case performance in practical circuits. Index Terms—Analogtodigital, data converters, dcfree sequences, delta–sigma (16), digitaltoanalog, dynamic element matching, mismatch shaping, multibit, sigma–delta, spectral shaping. I.
TreeStructured DEM DACs with Arbitrary Numbers of Levels
"... Abstract—Unityweighted treestructured dynamic element matching (DEM) DACs are widely used in deltasigma (16) data converters to ensure that mismatches among nominally identical analog components give rise to shaped noise instead of nonlinear distortion. Treestructured DEM DACs offer an advantage ..."
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Cited by 1 (1 self)
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Abstract—Unityweighted treestructured dynamic element matching (DEM) DACs are widely used in deltasigma (16) data converters to ensure that mismatches among nominally identical analog components give rise to shaped noise instead of nonlinear distortion. Treestructured DEM DACs offer an advantage over other published DEM DACs in that the shaped noise from component mismatches can be made free of spurious tones. However, previously published unityweighted treestructured DEM DACs have the disadvantage that they require a poweroftwo number of nominally identical 1bit DACs. When applied to a 16 data converter with a nonpoweroftwo number of quantization steps, this requires the DEM DAC to have a larger input range than needed by the 16 data converter which wastes power and circuit area. This paper presents a generalized treestructured DEM encoder applicable to DEM DACs with any number of 1bit DACs, thereby avoiding this limitation. Index Terms—Digitaltoanalog conversion, dynamic element matching (DEM), encoder. I.
A HigherOrder MismatchShaping Method for Multi Bit SigmaDelta Modulators
"... (DEM) methods are extensively used in multibit SigmaDelta Modulators (SDM) to reduce the effects of element mismatches. To date, only first and secondorder mismatchshaping DEM techniques have been reported in the literature. In this paper, a higherorder mismatchshaping DEM method is reported, ..."
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(DEM) methods are extensively used in multibit SigmaDelta Modulators (SDM) to reduce the effects of element mismatches. To date, only first and secondorder mismatchshaping DEM techniques have been reported in the literature. In this paper, a higherorder mismatchshaping DEM method is reported, which is an extension of the known vectorfeedback mismatchshaping technique. Example simulation results are presented for thirdorder and fourthorder mismatchshaping DEMs. I.