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252
MPFR: A multipleprecision binary floatingpoint library with correct rounding
 ACM Trans. Math. Softw
, 2007
"... This paper presents a multipleprecision binary floatingpoint library, written in the ISO C language, and based on the GNU MP library. Its particularity is to extend to arbitraryprecision ideas from the IEEE 754 standard, by providing correct rounding and exceptions. We demonstrate how these stron ..."
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Cited by 134 (18 self)
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This paper presents a multipleprecision binary floatingpoint library, written in the ISO C language, and based on the GNU MP library. Its particularity is to extend to arbitraryprecision ideas from the IEEE 754 standard, by providing correct rounding and exceptions. We demonstrate how these strong semantics are achieved — with no significant slowdown with respect to other arbitraryprecision tools — and discuss a few applications where such a library can be useful. Categories and Subject Descriptors: D.3.0 [Programming Languages]: General—Standards; G.1.0 [Numerical Analysis]: General—computer arithmetic, multiple precision arithmetic; G.1.2 [Numerical Analysis]: Approximation—elementary and special function approximation; G 4 [Mathematics of Computing]: Mathematical Software—algorithm design, efficiency, portability
APPROXIMATION THEORY AND APPROXIMATION PRACTICE
"... — the constructive approximation of functions. ..."
MetiTarski: An Automatic Theorem Prover for RealValued Special Functions
"... Abstract Many theorems involving special functions such as ln, exp and sin can be proved automatically by MetiTarski: a resolution theorem prover modified to call a decision procedure for the theory of real closed fields. Special functions are approximated by upper and lower bounds, which are typica ..."
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Cited by 44 (7 self)
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Abstract Many theorems involving special functions such as ln, exp and sin can be proved automatically by MetiTarski: a resolution theorem prover modified to call a decision procedure for the theory of real closed fields. Special functions are approximated by upper and lower bounds, which are typically rational functions derived from Taylor or continued fraction expansions. The decision procedure simplifies clauses by deleting literals that are inconsistent with other algebraic facts. MetiTarski simplifies arithmetic expressions by conversion to a recursive representation, followed by flattening of nested quotients. Applications include verifying hybrid and control systems.
Tablebased polynomials for fast hardware function evaluation
 16th IEEE International Conference on ApplicationSpecific Systems, Architectures, and Processors (ASAP’05
, 2005
"... Many general tablebased methods for the evaluation in hardware of elementary functions have been published. The bipartite and multipartite methods implement a firstorder approximation of the function using only table lookups and additions. Recently, a singlemultiplier secondorder method of simil ..."
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Cited by 41 (14 self)
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Many general tablebased methods for the evaluation in hardware of elementary functions have been published. The bipartite and multipartite methods implement a firstorder approximation of the function using only table lookups and additions. Recently, a singlemultiplier secondorder method of similar inspiration has also been published. This paper extends such methods to approximations of arbitrary order, using adders, small multipliers, and very small adhoc powering units. We obtain implementations that are both smaller and faster than previously published approaches. This paper also deals with the FPGA implementation of such methods. Previous work have consistently shown that increasing the approximation degree lead to not only smaller but also faster designs, as the reduction of the table size meant a reduction of its lookup time, which compensated for the addition and multiplication time. The experiments in this paper suggest that this still holds when going from order 2 to order 3, but no longer when using higherorder approximations, where a tradeoff appears. 1.
A MachineChecked Theory of Floating Point Arithmetic
, 1999
"... . Intel is applying formal verification to various pieces of mathematical software used in Merced, the first implementation of the new IA64 architecture. This paper discusses the development of a generic floating point library giving definitions of the fundamental terms and containing formal pr ..."
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Cited by 41 (5 self)
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. Intel is applying formal verification to various pieces of mathematical software used in Merced, the first implementation of the new IA64 architecture. This paper discusses the development of a generic floating point library giving definitions of the fundamental terms and containing formal proofs of important lemmas. We also briefly describe how this has been used in the verification effort so far. 1 Introduction IA64 is a new 64bit computer architecture jointly developed by HewlettPackard and Intel, and the forthcoming Merced chip from Intel will be its first silicon implementation. To avoid some of the limitations of traditional architectures, IA64 incorporates a unique combination of features, including an instruction format encoding parallelism explicitly, instruction predication, and speculative /advanced loads [4]. Nevertheless, it also offers full upwardscompatibility with IA32 (x86) code. 1 IA64 incorporates a number of floating point operations, the centerpi...
The Symmetric Table Addition Method for Accurate Function Approximation
 Journal of VLSI Signal Processing
, 1999
"... . This paper presents a highspeed method for computing elementary functions using parallel table lookups and multioperand addition. Increasing the number of tables and inputs to the multioperand adder significantly reduces the amount of memory required. Symmetry and leading zeros in the table co ..."
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Cited by 37 (2 self)
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. This paper presents a highspeed method for computing elementary functions using parallel table lookups and multioperand addition. Increasing the number of tables and inputs to the multioperand adder significantly reduces the amount of memory required. Symmetry and leading zeros in the table coefficients are used to reduce the amount of memory even further. This method has a closedform solution for the table entries and can be applied to any differentiable function. For 24bit operands, this method requires two to three orders of magnitude less memory than conventional table lookups. Keywords: Elementary functions, table lookups, approximations, multioperand addition, computer arithmetic, hardware design. 1. Introduction Elementary function approximations are important in scientific computing, computer graphics, and digital signal processing applications. In the systolic array implementation of Cholesky decomposition, presented in [1], 30% of the cells approximate reciprocals...
Computing machineefficient polynomial approximations
 TRANSACTIONS ON MATHEMATICAL SOFTWARE
, 2006
"... Polynomial approximations are almost always used when implementing functions on a computing system. In most cases, the polynomial that best approximates (for a given distance and in a given interval) a function has coefficients that are not exactly representable with a finite number of bits. And yet ..."
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Cited by 30 (9 self)
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Polynomial approximations are almost always used when implementing functions on a computing system. In most cases, the polynomial that best approximates (for a given distance and in a given interval) a function has coefficients that are not exactly representable with a finite number of bits. And yet, the polynomial approximations that are actually implemented do have coefficients that are represented with a finite—and sometimes small—number of bits. This is due to the finiteness of the floatingpoint representations (for software implementations), and to the need to have small, hence fast and/or inexpensive, multipliers (for hardware implementations). We then have to consider polynomial approximations for which the degreei coefficient has at most mi fractional bits; in other words, it is a rational number with denominator 2mi. We provide a general and efficient method for finding the best polynomial approximation under this constraint. Moreover, our method also applies if some other constraints (such as requiring some coefficients to be equal to some predefined constants or minimizing relative error instead of absolute error) are required.
Some improvements on multipartite table methods
 15TH IEEE SYMPOSIUM ON COMPUTER ARITHMETIC
, 2001
"... This paper presents an unified view of most previous tablelookupandaddition methods: bipartite tables, SBTM, STAM and multipartite methods. This new definition allows a more accurate computation of the error entailed by these methods. Being more general, it also allows an exhaustive design space ..."
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Cited by 29 (8 self)
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This paper presents an unified view of most previous tablelookupandaddition methods: bipartite tables, SBTM, STAM and multipartite methods. This new definition allows a more accurate computation of the error entailed by these methods. Being more general, it also allows an exhaustive design space exploration which has been implemented, and leads to tables smaller than previously published ones by up to 50%. Some results have been synthesised for Virtex FPGAs, and are discussed in this paper.
Optimizing hardware function evaluation
 IEEE Transactions on Computers
, 2005
"... Abstract—We present a methodology and an automated system for function evaluation unit generation. Our system selects the best function evaluation hardware for a given function, accuracy requirements, technology mapping, and optimization metrics, such as area, throughput, and latency. Function evalu ..."
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Cited by 28 (5 self)
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Abstract—We present a methodology and an automated system for function evaluation unit generation. Our system selects the best function evaluation hardware for a given function, accuracy requirements, technology mapping, and optimization metrics, such as area, throughput, and latency. Function evaluation fðxÞ typically consists of range reduction and the actual evaluation on a small convenient interval such as 0; =2Þ for sinðxÞ. We investigate the impact of hardware function evaluation with range reduction for a given range and precision of x and fðxÞ on area and speed. An automated bitwidth optimization technique for minimizing the sizes of the operators in the data paths is also proposed. We explore a vast design space for fixedpoint sinðxÞ, logðxÞ, and ffiffiffixp accurate to one unit in the last place using MATLAB and ASC, A Stream Compiler for FieldProgrammable Gate Arrays (FPGAs). In this study, we implement over 2,000 placedandrouted FPGA designs, resulting in over 100 million ApplicationSpecific Integrated Circuit (ASIC) equivalent gates. We provide optimal function evaluation results for range and precision combinations between 8 and 48 bits. Index Terms—Computer arithmetic, elementary function approximation, gate arrays, minimax approximation and algorithms, optimization. 1