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Cube Diagram Bundles: A New Representation Of Strongly Unspecified MultipleValued Functions And Relations
 Proc. ISMVL'97
, 1997
"... Efficient function representation is very important for speed and memory requirements of multiplevalued decomposers. This paper presents a new representation of multiplevalued relations (functions in particular), called MultipleValued Cube Diagram Bundles (MVCDB). MVCDBs improve on Rough Partitio ..."
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Cited by 7 (6 self)
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Efficient function representation is very important for speed and memory requirements of multiplevalued decomposers. This paper presents a new representation of multiplevalued relations (functions in particular), called MultipleValued Cube Diagram Bundles (MVCDB). MVCDBs improve on Rough Partition representation by labeling their blocks with variable values and by representing blocks efficiently. The MVCDB representation is especially efficient for very strongly unspecified multiplevalued input, multiplevalued output functions and relations, typical for Machine Learning applications. 1 I. Introduction. Multiplevalued functions and relations that include very many don't cares are becoming increasingly important in several areas of applications such as Machine Learning and Knowledge Discovery [16] and also in combinational and sequential circuit design. It is important to have an efficient representation for such relations. For instance, the successes of many binary decomposers d...
Dynamic ReEncoding During MDD Minimization
 In ISMVL
, 2000
"... Multivalued decision diagrams (MDDs) are a generalization of binary decision diagrams (BDDs). They often allow efficient representation of functions with multivalued input variables similar to BDDs in the binary case. Therefore they are suitable for several applications in synthesis and verificati ..."
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Cited by 4 (1 self)
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Multivalued decision diagrams (MDDs) are a generalization of binary decision diagrams (BDDs). They often allow efficient representation of functions with multivalued input variables similar to BDDs in the binary case. Therefore they are suitable for several applications in synthesis and verification of integrated circuits. MDD sizes counted in number of nodes vary from linear to exponential dependent on the variable ordering used. In all these applications, minimization of MDDs is crucial. In many cases, multivalued variables are composed by a certain number of binary variables, and so the multivalued inputs arise by grouping binary variables. The selection of these groups, that is, the decision which variables to merge, has enormous impact on MDD sizes. Techniques for finding variable groupings before starting MDD minimization have been proposed recently. In this paper, we present a new method that uses reencoding, i.e. dynamic variable grouping. We don't choose one fixed variab...
Reordering Based Synthesis
 in Proc. of the 3rd Int. Workshop on Applications of the ReedMuller Expansion in Circuit Design (RM'97
, 1997
"... Reordering Based Synthesis (RBS) as an alternative approach to manipulate Decision Diagrams (DDs) is presented. Based on the concept of operation nodes a single "core" operation, i.e. an extended Level Exchange (LE), is sufficient to perform the usual synthesis operations on several types of DDs. RB ..."
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Cited by 4 (1 self)
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Reordering Based Synthesis (RBS) as an alternative approach to manipulate Decision Diagrams (DDs) is presented. Based on the concept of operation nodes a single "core" operation, i.e. an extended Level Exchange (LE), is sufficient to perform the usual synthesis operations on several types of DDs. RBS allows the integration of dynamic variable ordering (even) within a single synthesis operation (e.g. an ANDoperation) and thus provides the possibility of avoiding huge peak sizes during the construction. The optimization potential is significantly enlarged by allowing LEs even between operation nodes. A large number of experimental results for the BDD case confirm the validity of the concept.
MDDBased Synthesis of MultiValued Logic Networks
 In Proceedings of the IEEE Conference on MultipleValued Logic
, 2000
"... A method for the synthesis of large MultiValued Logic Networks (MVLNs) using MultiValued Decision Diagrams (MDDs) is presented. The size of the resulting circuit is linear in the size of the original MDD. In contrast to previously presented approaches to circuit design using MDDs, here the nodes a ..."
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Cited by 3 (1 self)
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A method for the synthesis of large MultiValued Logic Networks (MVLNs) using MultiValued Decision Diagrams (MDDs) is presented. The size of the resulting circuit is linear in the size of the original MDD. In contrast to previously presented approaches to circuit design using MDDs, here the nodes are not substituted by multiplexers. Instead, a small circuit is created representing the functionality of each edge in the graph. The resulting circuits have nice properties with respect to area/delay estimation and power dissipation. Experimental results are given to illustrate the efficiency of the approach. 1. Introduction The use of Decision Diagrams (DDs) is becoming increasingly popular in the area of electronic design automation. DDs represent a function as a directed acyclic graph, and have generated great interest due to their ability to represent certain functions in a very compact form. DDs can be regarded as representing the function in a behavioral, rather than structural form...
Error Diagnosis in Sequential MultiValued Logic Networks
"... In this paper we present a model for diagnosis of errors in Sequential MultiValued Logic Networks (SMVLN). The method allows not only to detect errors in an implementation, but also identifies the fault location. In contrast to many previously presented approaches this model does not consider a spe ..."
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In this paper we present a model for diagnosis of errors in Sequential MultiValued Logic Networks (SMVLN). The method allows not only to detect errors in an implementation, but also identifies the fault location. In contrast to many previously presented approaches this model does not consider a specific implementation. Instead the model assumes tests based on the transition behavior of the corresponding MVL Finite State Machine (FSM) on the functional level. We present a method for constructing a minimal cost test based on AND/OR graphs using tests with MV outcomes. The model enables encoding over twovalued circuits as well as consideration of SMVLNs. The new approach provides efficient solution even for large MVL FSMs with up to 50000 states. Experimental results for randomly generated FSMs are given that demonstrate the efficiency of our approach. 1 Introduction Several circuit design methods for MultiValued Logic (MVL) have been proposed in the past few years [3, 6]. These new ...
A Note on Symbolic Simulation using Decision Diagrams
"... If Decision Diagrams (DDs) are used for the representation of the logical behavior of a combinational logic circuit it has to be traversed in topological order. At each gate the corresponding synthesis operation is carried out. This traversal process is called symbolic simulation. ..."
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If Decision Diagrams (DDs) are used for the representation of the logical behavior of a combinational logic circuit it has to be traversed in topological order. At each gate the corresponding synthesis operation is carried out. This traversal process is called symbolic simulation.