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A Graphical Interval Logic for Specifying Concurrent Systems
 ACM Transactions on Software Engineering and Methodology
, 1994
"... The paper describes a graphical interval logic that is the foundation of a toolset supporting formal specification and verification of concurrent software systems. Experience has shown that most software engineers find standard temporal logics difficult to understand and to use. The objective of ..."
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Cited by 63 (13 self)
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The paper describes a graphical interval logic that is the foundation of a toolset supporting formal specification and verification of concurrent software systems. Experience has shown that most software engineers find standard temporal logics difficult to understand and to use. The objective of this work is to enable software engineers to specify and reason about temporal properties of concurrent systems more easily by providing them with a logic that has an intuitive graphical representation and with tools that support its use. To illustrate the use of the graphical logic, the paper provides some specifications for an elevator system and proves several properties of the specifications. The paper also describes the toolset and the implementation. 1 Introduction One of the great challenges facing today's software engineers is the development of correct programs for real applications. Recent advances in hardware reliability and fault tolerance technology can assure extremely lo...
VERSA: A Tool for the Specification and Analysis of ResourceBound RealTime Systems
 Journal of Computer and Software Engineering
, 1995
"... VERSA is a tool that assists in the algebraic analysis of realtime systems. It is based on ACSR, a timed process algebra designed to express resourcebound realtime distributed systems. VERSA is designed to be both a usable and useful tool for the analysis of ACSR specifications. Usability is a ..."
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Cited by 38 (27 self)
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VERSA is a tool that assists in the algebraic analysis of realtime systems. It is based on ACSR, a timed process algebra designed to express resourcebound realtime distributed systems. VERSA is designed to be both a usable and useful tool for the analysis of ACSR specifications. Usability is assured by a flexible user interface that uses ACSR's traditional notation augmented with conventions from programming languages and mathematics that allow concise specification of realistic systems. Usefulness is the result of the breadth of analysis techniques planned and currently implemented, including algebraic term rewriting and statespace exploration based techniques. 1 Introduction Reliability in realtime systems can be improved through the use of formal methods for the specification and analysis of realtime systems. Formal methods treat system components as mathematical objects and provide mathematical models to describe and predict the observable properties and behaviors of...
A Visual Formalism for Real Time Requirement Specifications
 In TransformationBased Reactive System Development, number 1231 in LNCS
, 1997
"... . This paper presents a semantical basis of a graphical specification language, called realtime symbolic timing diagrams (RTSTD), to express realtime requirements of embedded systems. RTSTD allow a concise and unambigous formulation of realtime properties that are intuitively understandable by h ..."
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Cited by 21 (3 self)
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. This paper presents a semantical basis of a graphical specification language, called realtime symbolic timing diagrams (RTSTD), to express realtime requirements of embedded systems. RTSTD allow a concise and unambigous formulation of realtime properties that are intuitively understandable by hardware designers. We give a precise semantical foundation of this graphical language in terms of realtime temporal logic. Due to this interpretation RTSTD can be embedded into existing verification tools to check whether an implementation satiesfies the given specification expressed as RTSTD. 1 Introduction Nowadays embedded control systems can be found in varying areas such as automotive, production technique, plant control and avionics. Essential for these control systems are their reactive nature. Furthermore, these systems are often safetycritical where an error may lead to catastrophic results for people, material asset, and environment. These safety requirements include real time c...
Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System
 Proceedings of the Eighth International Conference on Computer Aided Verification CAV, volume 1102 of Lecture Notes in Computer Science
, 2000
"... In this work we propose a verification methodology consisting of selective quantitative analysis and interval model checking. Our methods can aid not only in determining if a system works correctly, but also in understanding how well the system works. ..."
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Cited by 17 (5 self)
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In this work we propose a verification methodology consisting of selective quantitative analysis and interval model checking. Our methods can aid not only in determining if a system works correctly, but also in understanding how well the system works.
Efficient Decompositional ModelChecking for Regular Timing Diagrams
 In CHARME
, 1999
"... There is a growing need to make verification tools easier to use. A solution that does not require redesigning the tool is to construct frontends providing specification notations that are close to those used in practice. Timing diagrams are such a widely used graphical notation, one that is ofte ..."
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Cited by 10 (2 self)
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There is a growing need to make verification tools easier to use. A solution that does not require redesigning the tool is to construct frontends providing specification notations that are close to those used in practice. Timing diagrams are such a widely used graphical notation, one that is often more appealing than a "linear" textual notation. This paper introduces a class of timing diagrams called Regular Timing Diagrams (RTDs). RTDs have a precise syntax and a formal semantics that is simple and corresponds to common usage. In addition, RTDs have an inherent compositional structure, which is exploited to provide an efficient algorithm for modelchecking an RTD with respect to a system description. The algorithm has time complexity that is a small polynomial in the size of the diagram and linear in the size of the structure. We demonstrate the applicability of our algorithms by verifying that a masterslave system satisfies its specification RTDs.
PARAGON: A Paradigm for the Specification, Verification, and Testing of RealTime Systems
 IN IEEE AEROSPACE CONFERENCE
"... The PARAGON toolset provides an environment for the modular and hierarchical design of resourcebound, realtime systems. It offers wellintegrated graphical and textual specification languages with formal semantics. Both languages are based on the Algebra of Communicating Shared Resources (ACSR), ..."
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Cited by 8 (5 self)
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The PARAGON toolset provides an environment for the modular and hierarchical design of resourcebound, realtime systems. It offers wellintegrated graphical and textual specification languages with formal semantics. Both languages are based on the Algebra of Communicating Shared Resources (ACSR), a process algebra with explicit notions of time, resources and priority. The integration of the three notions widens the applicability of the PARAGON formalisms to embedded systems, control systems, and faulttolerant systems where runtime resource requirements must be considered during the design phase. To facilitate the design of complex systems, PARAGON allows a designer to describe a system incrementally through refinement steps that preserve system properties. To increase dependentability of system models, PARAGON offers three types of analysis: automated verification of system requirements, interactive simulation, and testing. In this paper, we demonstrate the design methodology that PARAGON offers through examples.
Prospec: Support for Elicitation and Formal Specification of Software Properties
 in Proc. of Runtime Verification Workshop, ENTCS
"... Although formal verification techniques have been demonstrated to improve program dependability, software practitioners have not widely adopted them. One reason often cited is the difficulty in writing formal specifications. This paper introduces Prospec, a tool to assist practitioners in formally s ..."
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Cited by 8 (2 self)
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Although formal verification techniques have been demonstrated to improve program dependability, software practitioners have not widely adopted them. One reason often cited is the difficulty in writing formal specifications. This paper introduces Prospec, a tool to assist practitioners in formally specifying software properties. Prospec uses property patterns and scopes. Previous efforts at providing tool support for property specification have not provided convenient abstractions for specifying properties that include multiple events or conditions. A taxonomy of composite propositions is introduced to address this issue by defining relations among propositions and providing graphical abstractions that can assist in specification and validation of properties. This paper shows how composite propositions can enhance the specification pattern system by helping practitioners consider subtleties of behavior in sequences and concurrency through directed questions and visual abstractions. The paper introduces an elicitation and specification process to define patterns, scopes, and composite propositions. 1.
Interval Logics and Their Decision Procedures  Part II: A RealTime Interval Logic
 Theoretical Computer Science
, 1996
"... In a companion paper, we presented an interval logic, and showed that it is elementarily decidable. In this paper we extend the logic to allow reasoning about realtime properties of concurrent systems; we call this logic RealTime Future Interval Logic (RTFIL). We model time by the real numbers, an ..."
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Cited by 8 (1 self)
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In a companion paper, we presented an interval logic, and showed that it is elementarily decidable. In this paper we extend the logic to allow reasoning about realtime properties of concurrent systems; we call this logic RealTime Future Interval Logic (RTFIL). We model time by the real numbers, and allow our syntax to state the bounds on the duration of an interval. RTFIL possesses the "realtime interpolation property," which appears to be the natural quantitative counterpart of invariance under finite stuttering. As the main result of this paper, we show that RTFIL is decidable; the decision algorithm is slightly more expensive than for the untimed logic. Our decidability proof is based on the reduction of the satisfiability problem for the logic to the emptiness problem for timed Buchi automata. The latter problem was shown decidable by Alur and Dill in a landmark paper, in which this realtime extension of !automata was introduced. Finally, we consider an extension of the logic ...
Tools and Techniques for the Design and Systematic Analysis of RealTime Systems
, 1999
"... As technology progresses and computers become smaller, cheaper, and more powerful, they are increasingly relied on to guarantee the safety of human life and the environment. In most cases, it is not enough to merely provide such safety mechanisms, but is also critical to assure that they will be a ..."
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Cited by 6 (4 self)
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As technology progresses and computers become smaller, cheaper, and more powerful, they are increasingly relied on to guarantee the safety of human life and the environment. In most cases, it is not enough to merely provide such safety mechanisms, but is also critical to assure that they will be activated in time to prevent disasters. These realtime systems are found in both largescale projects with highly visible consequences such as nuclear reactors and air traffic control systems as well as in consumer goods such as automobiles and smoke detectors. As more and more reliance is placed on realtime computing systems to perform critical and everyday functions, the need for formal methods to guarantee the correctness of these systems becomes crucial. Given the time
Visual Specifications for Temporal Reasoning
 Journal of Visual Languages and Computing
"... Graphical Interval Logic (GIL) is a visual temporal logic in which formulas resemble the informal timing diagrams familiar to system designers and software engineers. It provides an intuitive and natural visual notation in which to express specifications for concurrent systems and retains the benefi ..."
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Cited by 3 (2 self)
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Graphical Interval Logic (GIL) is a visual temporal logic in which formulas resemble the informal timing diagrams familiar to system designers and software engineers. It provides an intuitive and natural visual notation in which to express specifications for concurrent systems and retains the benefits of a formal notation. A visual editor permits GIL specifications to be easily constructed, and to be stored in and retrieved from files. The editor interfaces with a proof checker and model generator, which permit verification of temporal inferences. The paper shows how graphical specifications are created and used to reason about temporal properties of systems. It shows how pictures that formalize temporal arguments enhance understanding and help motivate successful proof strategies. 1 Introduction Temporal logic [7] provides a rigorous framework for expressing temporal properties of concurrent systems and has been a focus of much research activity in the last decade. Temporal logic spe...