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Digital Circuit Optimization via Geometric Programming
 Operations Research
, 2005
"... informs ® doi 10.1287/opre.1050.0254 © 2005 INFORMS This paper concerns a method for digital circuit optimization based on formulating the problem as a geometric program (GP) or generalized geometric program (GGP), which can be transformed to a convex optimization problem and then very efficiently s ..."
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Cited by 27 (7 self)
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informs ® doi 10.1287/opre.1050.0254 © 2005 INFORMS This paper concerns a method for digital circuit optimization based on formulating the problem as a geometric program (GP) or generalized geometric program (GGP), which can be transformed to a convex optimization problem and then very efficiently solved. We start with a basic gate scaling problem, with delay modeled as a simple resistorcapacitor (RC) time constant, and then add various layers of complexity and modeling accuracy, such as accounting for differing signal fall and rise times, and the effects of signal transition times. We then consider more complex formulations such as robust design over corners, multimode design, statistical design, and problems in which threshold and power supply voltage are also variables to be chosen. Finally, we look at the detailed design of gates and interconnect wires, again using a formulation that is compatible with GP or GGP.
A tutorial on convex optimization
 In Proceedings of the 23th American Control Conference
"... Abstract — In recent years, convex optimization has become a computational tool of central importance in engineering, thanks to it’s ability to solve very large, practical engineering problems reliably and efficiently. The goal of this tutorial is to give an overview of the basic concepts of convex ..."
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Cited by 8 (1 self)
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Abstract — In recent years, convex optimization has become a computational tool of central importance in engineering, thanks to it’s ability to solve very large, practical engineering problems reliably and efficiently. The goal of this tutorial is to give an overview of the basic concepts of convex sets, functions and convex optimization problems, so that the reader can more readily recognize and formulate engineering problems using modern convex optimization. This tutorial coincides with the publication of the new book on convex optimization, by Boyd and Vandenberghe [7], who have made available a large amount of free course material and links to freely available code. These can be downloaded and used immediately by the audience both for selfstudy and to solve real problems. I.
Optimal doping profiles via geometric programming
 IEEE Transactions on Electron Devices
, 2005
"... Abstract—We first consider the problem of determining the doping profile that minimizes base transit time in a (homojunction) bipolar junction transistor. We show that this problem can be formulated as a geometric program, a special type of optimization problem that can be transformed to a convex op ..."
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Cited by 2 (1 self)
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Abstract—We first consider the problem of determining the doping profile that minimizes base transit time in a (homojunction) bipolar junction transistor. We show that this problem can be formulated as a geometric program, a special type of optimization problem that can be transformed to a convex optimization problem, and therefore solved (globally) very efficiently. We then consider several extensions to the basic problem, such as accounting for velocity saturation, and adding constraints on doping gradient, current gain, base resistance, and breakdown voltage. We show that a similar approach can be used to maximize the cutoff frequency, taking into account junction capacitances and forward transit time. Finally, we show that the method extends to the case of heterojunction bipolar junction transistors, in which the doping profile, as well as the profile of the secondary semiconductor, are to be jointly optimized. Index Terms—Base doping profile, base transit time minimization, cutoff frequency maximization, geometric programming, Geprofile optimization, optimal doping profile. I.
Design of posynomial models for mosfets: Symbolic regression using genetic algorithms
 Genetic Programming: Theory and Practice IV
, 2006
"... Summary. Starting from a broad description of analog circuit design in terms of topology design and sizing, we discuss the difficulties of sizing and describe approaches that are manual or automatic. These approaches make use of blackbox optimization techniques such as evolutionary algorithms or con ..."
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Cited by 1 (1 self)
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Summary. Starting from a broad description of analog circuit design in terms of topology design and sizing, we discuss the difficulties of sizing and describe approaches that are manual or automatic. These approaches make use of blackbox optimization techniques such as evolutionary algorithms or convex optimization techniques such as geometric programming. Geometric programming requires posynomial expressions for a circuit’s performance measurements. We show how a genetic algorithm can be exploited to evolve a posynomial expression (i.e. model) of transistor (i.e. mosfet) behavior more accurately than statistical techniques in the literature. 1
Certified by..........................................................
, 2008
"... Design of modern mixed signal integrated circuits is becoming increasingly difficult. Continued MOSFET scaling is approaching the global power dissipation limits while increasing transistor variability, thus requiring careful allocation of power and area resources to achieve increasingly more aggres ..."
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Design of modern mixed signal integrated circuits is becoming increasingly difficult. Continued MOSFET scaling is approaching the global power dissipation limits while increasing transistor variability, thus requiring careful allocation of power and area resources to achieve increasingly more aggressive performance specifications. In this tightly constrained environment traditional iterative systemtocircuit redesign loop, is becoming inefficient. With complex system architectures and circuit specifications approaching technological limits of the process employed, the designers have less room to margin for the overhead of strict system and circuit design interdependencies. Severely constrained modern mixed IC design can take many iterations to converge in such a design flow. This is an expensive and time consuming process. The situation is particularly acute in highspeed links. As an important building block of many systems (high speed I/O, onchip communication,...) power efficiency and area footprint are of utmost importance. Design of these systems is challenging in both system and circuit domain. On one hand system architectures are becoming