syntax, and syntactic and semantic domains of a flow graph Figure 9. Semantic equations Def and Exp of a flow graph The first argument to the functions Def and Exp specifies a set of nodes that represent a flow graph, from which the element(s) of current interest are selected by pattern matching.

functional programming, process network, declarative annotation, transputer, program transformation To get high performance on a distributed-memory multicomputer at present and for the foreseeable future, some explicit control is needed. This paper describes work aimed at harnessing the power of the functional notation in exercising such control. We have developed a declarative annotation scheme which allows explicit control over process placement and communications. The language, called Caliban, has been implemented on a con gurable, looselycoupled commercial multicomputer and we describe the compiler and run-time system.

Although a number of tool boxes for compiler construction exist, the language implementation task can often be made easier by building specialised tools. A prototype Haskell system was implemented within a four month period using such an approach. The system is currently used as a front end for a transputer array, Haskell implementation. In this article we describe the tool building aspect of the implementation process. The little language tools, tree processing function generators and error message management routines developed are described. Although the tools are specific to this implementation, this mode of work can be worthwhile in a number of cases such as the implementation of novel languages, the targeting of unconventional architectures or, the experimentation with new implementation techniques. The lessons learned during this process are summarised and the specialised tool approach is evaluated. 1 Introduction A great number of tools [19] and many complete tool boxe...

The aim of the FAST project is to provide an implementation of a lazy functional language on a transputer array. An important component of this system is a highly optimising compiler and runtime system for a single transputer. Efficient storage management is crucial in such an implementation, and this paper explores the demands placed on the storage manager by our compiled code. Statistics are presented illustrating the lifetime characteristics of cells, a break down of claimed cells by type, and other information which is of interest to the designer of a storage management system. We conclude that most cells are short lived, and that cell turnover is quite high. In addition, application cells are found to die much younger than cells of other types. We also examine the effect of vector apply cells on suspension forming activities. Finally we explore the possibility of using contextual information when predicting the lifetime of application and vector application cells, and suggest ways...

The research presented in this thesis is about the design and implementation of Naira, a parallel, parallelising compiler for a rich, purely functional programming language. The source language of the compiler is a subset of Haskell 1.2. The front end of Naira is written entirely in the Haskell subset being compiled. Naira has been successfully parallelised and it is the largest successfully parallelised Haskell program having achieved good absolute speedups on a network of SUN workstations. Having the same basic structure as other production compilers of functional languages, Naira's parallelisation technology should carry forward to other functional language compilers. The back end of Naira is written in C and generates parallel code in the C language which is envisioned to be run on distributed-memory machines. The code generator is based on a novel compilation scheme specified using a restricted form of Milner's ß-calculus which achieves asynchronous communication. We present the f...

Parallel graph reduction is a model for parallel program execution in which shared memory is used under a strict access regime with single assignment and blocking reads. We present the design of an efficient and accurate multiprocessor simulation scheme and the results of a simulation study of the pattern of access of a suite of benchmark programs. Background Parallel graph reduction (PGR) is a well-known technique which uses a shared graph structure to manage and synchronise the parallel execution of a functional program. It provides a simple model of communication and synchronisation between processors with distinctive properties of importance in the design and optimisation of coherent multicache implementations of shared memory (see Gupta et al [GGH91]). It is similar to MultiLisp's model [Hal85], and to dataflow-inspired mechanisms such as *T [NPA91], and much of our work is applicable in such contexts. The most successful implementations based on PGR (e.g. Goldberg's Buckwheat sy...

Parallel graph reduction is a simple model for parallel program execution which uses the shared-memory abstraction for all communication and synchronisation between processors. Shared memory is used under a strict access regime with single assignment and blocking reads. In this paper we present the design of an efficient and accurate multiprocessor simulation scheme suitable to work with a parallel graph reducer and use the simulator to study the performance and pattern of access of a suite of benchmark programs. Threads are never migrated to another processor by the parallel graph reducer, and the effect of this scheduling policy is investigated. 1 Motivation and Overview Successful implementations of parallel graph reduction have been built on stock multiprocessors (e.g. Goldberg's Buckwheat system (Goldberg, 1988) and Augustsson and Johnsson's ! ; G ? machine (Augustsson and Johnsson, 1989)), but the scalability of such systems is limited by contention for the shared snooping bus. ...