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14
Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits
, 2003
"... Uncertainty in circuit performance due to manufacturing and environmental variations is increasing with each new generation of technology. It is therefore important to predict the performance of a chip as a probabilistic quantity. This paper proposes three novel algorithms for statistical timing ana ..."
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Cited by 50 (7 self)
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Uncertainty in circuit performance due to manufacturing and environmental variations is increasing with each new generation of technology. It is therefore important to predict the performance of a chip as a probabilistic quantity. This paper proposes three novel algorithms for statistical timing analysis and parametric yield prediction of digital integrated circuits. The methods have been implemented in the context of the 42660 static timing analyzer. Numerical results are presented to study the strengths and weaknesses of these complementary approaches. Acrossthechip variability continues to be accommodated by 39516 's "Linear Combination of Delay (LCD)" mode. Timing analysis results in the face of statistical temperature and V dd variations are presented on an industrial ASIC part on which a bounded timing methodology leads to surprisingly wrong results.
Mismatch Analysis and Direct Yield Optimization by SpecWise Linearization and FeasibilityGuided Search
 IEEE DAC
, 2001
"... We present a new method for mismatch analysis and automatic yield optimization of analog integrated circuits with respect to global, local and operational tolerances. Effectiveness and efficiency of yield estimation and optimization are guaranteed by consideration of feasibility regions and by perfo ..."
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Cited by 24 (2 self)
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We present a new method for mismatch analysis and automatic yield optimization of analog integrated circuits with respect to global, local and operational tolerances. Effectiveness and efficiency of yield estimation and optimization are guaranteed by consideration of feasibility regions and by performance linearization at worstcase points. The proposed methods were successfully applied to two example circuits for an industrial fabrication process.
Design of robust test criteria in analog testing
 International Conference on Computer Aided Design
, 1996
"... Test design of analog circuits based on statistical methods for decision making is a topic of growing interest. The major problem of such statistical approaches with respect to industrial applicability concerns the confidence with which the determined test criteria can be applied in production testi ..."
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Cited by 6 (1 self)
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Test design of analog circuits based on statistical methods for decision making is a topic of growing interest. The major problem of such statistical approaches with respect to industrial applicability concerns the confidence with which the determined test criteria can be applied in production testing. This mainly refers to the consideration of measurement noise, to the selected measurements, as well as to the required training and validation samples. These crucial topics are addressed in this paper. On exploiting experience from the statistical design of analog circuits and from pattern recognition methods, efficient solutions to these problems are provided. A very robust test design is achieved by systematically considering measurement noise, by selecting most significant measurements, and by using most meaningful samples. Moreover, parametric as well as catastrophic faults are covered on application of digital testing methods. 1
The Generalized Boundary Curve  A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits
 IN PROCEEDINGS DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 2000
, 2000
"... In this paper, a new method for analog circuit sizing with respect to manufacturing and operating tolerances is presented. Two types of robustness objectives are presented, i.e. parameter distances for the nominal design and worstcase distances for the design centering. Moreover, the generalized bou ..."
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Cited by 4 (1 self)
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In this paper, a new method for analog circuit sizing with respect to manufacturing and operating tolerances is presented. Two types of robustness objectives are presented, i.e. parameter distances for the nominal design and worstcase distances for the design centering. Moreover, the generalized boundary curve is presented as a method to determine a parameter correction within an iterative trust region algorithm. Results show that a significant reduction in computational costs is achieved using the presented robustness objectives and generalized boundary curve.
Defining Cost Functions for Robust IC Design and Optimization
"... The ever increasing pace of analog IC design demands efficient means of automated design and optimization. Especially important is robust design. Its goal is to produce circuits whose behaviour stays within some predefined range when the manufacturing process variations and environmental effects rem ..."
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Cited by 2 (2 self)
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The ever increasing pace of analog IC design demands efficient means of automated design and optimization. Especially important is robust design. Its goal is to produce circuits whose behaviour stays within some predefined range when the manufacturing process variations and environmental effects remain bounded. Most of the design process is still handled by IC designers manually. We present a simple mathematical formulation of the robust design and optimization problem and its transformation into a constrained optimization problem by means of penalty functions. We illustrate the method on a robust differential amplifier design problem. The resulting circuits show that a computer not only can improve circuits designed by humans, but is also capable of designing a circuit with very little initial knowledge. Optimization runs resulted in circuits with similar or even better performance when compared to humanly designed circuits. The method can take advantage of parallel processing, but is still efficient enough to be run on a single computer.
Analog Circuit Sizing using Adaptive WorstCase Parameter Sets
, 2002
"... In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worstcase parameter sets. These sets are calculated adaptively during the sizing process based on sensitivity analyses. The method leads to robust designs w ..."
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Cited by 1 (0 self)
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In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worstcase parameter sets. These sets are calculated adaptively during the sizing process based on sensitivity analyses. The method leads to robust designs with high parametric yield, while being much more efficient than design centering methods.
Robust design and optimization of operating amplifiers
 IEEE Int. Conf. Industrial Technology
, 2003
"... Abstract—The performance requirements and deadlines in analog IC design are becoming more and more difficult to satisfy. Robust design produces circuits that fullfill the design requirements in several different operating environments and under the influence of manufacturing process variations. Gene ..."
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Cited by 1 (1 self)
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Abstract—The performance requirements and deadlines in analog IC design are becoming more and more difficult to satisfy. Robust design produces circuits that fullfill the design requirements in several different operating environments and under the influence of manufacturing process variations. Generally designers use computers only for evaluating the circuit. A method based on the robust design process practiced by IC designers is implemented by means of penalty functions and a generic optimization algorithm is used to solve the robust design problem. A designer must provide the circuit topology, the set of optimization parameters with their explicit constraints, the set of dependent parameters, and the set of performance constraints. The method is illustrated with a sample operating amplifier design, which is performed by the computer. The proposed approach is not restricted to amplifiers and can be used to automate the design of other types of circuits as well. 1
On cost function properties in analog circuit optimization
 Informacije MIDEM
"... Abstract: Analog circuit design is a very complex and time consuming process. The largest percentage of the time is spent trying to achieve the best performance by varying the circuit parameters. This is actually an optimization process and there is a growing desire to automate at least a part of th ..."
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Cited by 1 (1 self)
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Abstract: Analog circuit design is a very complex and time consuming process. The largest percentage of the time is spent trying to achieve the best performance by varying the circuit parameters. This is actually an optimization process and there is a growing desire to automate at least a part of the optimization procedure. Unfortunately the optimization algorithms are still very slow. This is mostly due to the sheer number of circuit analyses it takes for the optimization algorithm to converge to a minimum. Obviously any previous knowledge about the shape of the cost function could help the optimization algorithm to converge faster. Unfortunately (again) the shape of the cost function is generally too unpredictable to draw any conclusions prior to the optimization run. This paper tries to show that with a special formulation of the cost function the shape of the cost function itself can be at least partially predicted. Vpogled v značilnosti kriterijskih funkcij optimizacijskih algoritmov Ključne besede: računalniško podprto načrtovanje, analogna vezja, optimizacijski algoritmi, kriterijska funkcija, parameterski prostor Povzetek: Načrtovanje analognih vezij je zelo zapleten postopek, najtežji del katerega pa je zagotovo določanje optimalnih vrednosti parametrov vezja. Pri tem gre v bistvu za optimizacijski postopek, kjer načrtovalec s spreminjanjem vrednosti parametrov skuša doseči čim boljše delovanje vezja. Zaradi zahtevnosti postopka se pojavlja vse večja želja po določeni avtomatizaciji, to je uporabi optimizacijskih algoritmov za določanje teh parametrov. Žal so optimizacijski algoritmi zelo zamudni, to pa zaradi velikega števila analiz, ki jih morajo opraviti. Vsaka vnaprejšnja informacija o lastnostih kriterijske funkcije je zato zelo dobrodošla saj lahko skrajša čas optimizacije. V splošnem velja, da je oblika kriterijske funkcije nepredvidljiva. Ta članek skuša nakazati, da je v določenih primerih mogoče obliko kriterijske funkcije do določene mere vnaprej predvideti. 1.
Automatic Design Centering of Analog Integrated Circuits Based On . . .
, 1999
"... In this report a method for the design centering of analog circuits, based on worstcase distances (WCD) is presented. In order to keep the linearization error small, only the WCDs and not the strongly nonlinear objective function itself is linearized. For the resulting nonlinear trustregion prob ..."
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Cited by 1 (1 self)
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In this report a method for the design centering of analog circuits, based on worstcase distances (WCD) is presented. In order to keep the linearization error small, only the WCDs and not the strongly nonlinear objective function itself is linearized. For the resulting nonlinear trustregion problem the generalized boundary curve (GBC) is derived as a method to determine a solution with a good ratio between error reduction and norm of the parameter correction. This parameter correction is used in a standard iterative trustregion optimization algorithm. Results calculated on a circuit example show a signifcant reduction of iterations compared to a standard gradientbased optimization algorithm. Thus, design centering becomes applicable within industrial analog circuit design.