Tracing tools are used widely to help analyze, design, and tune both hardware and software systems. This paper describes a tool called Shade which combines efficient instruction-set simulation with a flexible, extensible trace generation capability. Efficiency is achieved by dynamically compiling and caching code to simulate and trace the application program. The user may control the extent of tracing in a variety of ways; arbitrarily detailed application state information may be collected during the simulation, but tracing less translates directly into greater efficiency. Current Shade implementations run on SPARC systems and simulate the SPARC (Versions 8 and 9) and MIPS I instruction sets. This paper describes the capabilities, design, implementation, and performance of Shade, and discusses instruction set emulation in general.

This memoization makes the simulator run 5--12 times faster, with no change in simulation results (e.g., cycle count). Combining direct-execution and memoization, FastSim simulates a MIPS R10000-like microarchitecture with a 190--360 times slowdown (i.e., simulation time over native benchmark execution time on the host), which is an order of magnitude faster than SimpleScalar.

During the recent years the study of new parallel architectures has intensified. The design of a new architecture entails the study of a variety of configuration parameters. During the design of an architecture it is expensive and non-flexible to build an actual prototype and thereof to evaluate the performance of a new architecture the most used method is simulation. This report provides an overview of the simulation techniques presently employed by several generalpurpose simulation environments for the simulation and evaluation of computer architectures. We address several issues which general architecture simulators consider in order to provide enough flexibility to specify and simulate a wide range of distributed architectures. In particular, we focus on a new emerging research field ¾ parallel simulation of parallel architectures. 1. Introduction The area of research of new parallel architectures has intensified during the recent years thanks to the development of cheap hardware...