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19
Symbolic Boolean manipulation with ordered binarydecision diagrams
 ACM Computing Surveys
, 1992
"... Ordered BinaryDecision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as grap ..."
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Cited by 942 (14 self)
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Ordered BinaryDecision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as graph algorithms on OBDD
Fast functional simulation using branching programs
 In Proceedings of the IEEE International Conference on ComputerAided Design
, 1995
"... This paper addresses the problem of speeding up functional (delayindependent) logic simulation for synchronous digital systems. The problem needs very little new motivation – cyclebased functional simulation is the largest consumer of computing cycles in system design. Most existing simulators for ..."
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Cited by 64 (0 self)
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This paper addresses the problem of speeding up functional (delayindependent) logic simulation for synchronous digital systems. The problem needs very little new motivation – cyclebased functional simulation is the largest consumer of computing cycles in system design. Most existing simulators for this task can be classified as being either event driven or levelized compiledcode, with the levelized compiled code simulators generally being considered faster for this task. An alternative technique, based on evaluation using branching programs, was suggested about a decade ago in the context of switch level functional simulation. However, this had very limited application since it could not handle the large circuits encountered in practice. This paper resurrects the basic idea present this technique and provides significant modifications that enable its application to contemporary industrial strength circuits. We present experimental results that demonstrate up to a 10X speedup over levelized compiled code simulation for a large suite of benchmark circuits as well as for industrial examples with over 40,000 gates. 1
Synthesis of software programs for embedded control applications
 IEEE TRANS. CAD
, 1999
"... Software components for embedded reactive realtime applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient intermediate format for embedded system cosynthesis, between highlevel specification languages and software or hardware impl ..."
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Cited by 61 (5 self)
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Software components for embedded reactive realtime applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient intermediate format for embedded system cosynthesis, between highlevel specification languages and software or hardware implementations. We propose a software generation methodology that takes advantage of a restricted class of specifications and allows for tight control over the implementation cost. The methodology exploits several techniques from the domain of Boolean function optimization. We also describe how the simplified control/dataflow graph used as an intermediate representation can be used to accurately estimate the size and timing cost of the final executable code.
Structure and Importance of LogspaceMODClasses
, 1992
"... . We refine the techniques of Beigel, Gill, Hertrampf [4] who investigated polynomial time counting classes, in order to make them applicable to the case of logarithmic space. We define the complexity classes MOD k L and demonstrate their significance by proving that all standard problems of linear ..."
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Cited by 43 (1 self)
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. We refine the techniques of Beigel, Gill, Hertrampf [4] who investigated polynomial time counting classes, in order to make them applicable to the case of logarithmic space. We define the complexity classes MOD k L and demonstrate their significance by proving that all standard problems of linear algebra over the finite rings Z/kZ are complete for these classes. We then define new complexity classes LogFew and LogFewNL and identify them as adequate logspace versions of Few and FewP. We show that LogFewNL is contained in MODZ k L and that LogFew is contained in MOD k L for all k. Also an upper bound for L #L in terms of computation of integer determinants is given from which we conclude that all logspace counting classes are contained in NC 2 . 1 Introduction Valiant [21] defined the class #P of functions f such that there is a nondeterministic polynomial time Turing machine which, on input x, has exactly f(x) accepting computation paths. Many complexity classes in the area betw...
On the Relation Between BDDs and FDDs
 INFORMATION AND COMPUTATION
, 1995
"... Data structures for Boolean functions build an essential component of design automation tools, especially in the area of logic synthesis. The state of the art data structure is the ordered binary decision diagram (OBDD), which results from general binary decision diagrams (BDDs), also called bran ..."
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Cited by 28 (12 self)
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Data structures for Boolean functions build an essential component of design automation tools, especially in the area of logic synthesis. The state of the art data structure is the ordered binary decision diagram (OBDD), which results from general binary decision diagrams (BDDs), also called branching programs, by ordering restrictions. In the context of EXORbased logic synthesis another type of decision diagram (DD), called (ordered) functional decision diagram ((O)FDD) becomes increasingly important. We study the relation between (ordered, free) BDDs and FDDs. Both, BDDs and FDDs, result from DDs by defining the represented function in different ways. If the underlying DD is complete, the relation between both types of interpretation can be described by a Boolean transformation . This allows us to relate the FDDsize of f and the BDDsize of (f) also in the case that the corresponding DDs are free or ordered, but not (necessarily) complete. We use this property to derive...
Using the Minimum Description Length Principle to Infer Reduced Ordered Decision Graphs
 Machine Learning
, 1996
"... . We propose an algorithm for the inference of decision graphs from a set of labeled instances. In particular, we propose to infer decision graphs where the variables can only be tested in accordance with a given order and no redundant nodes exist. This type of graphs, reduced ordered decision graph ..."
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Cited by 11 (1 self)
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. We propose an algorithm for the inference of decision graphs from a set of labeled instances. In particular, we propose to infer decision graphs where the variables can only be tested in accordance with a given order and no redundant nodes exist. This type of graphs, reduced ordered decision graphs, can be used as canonical representations of Boolean functions and can be manipulated using algorithms developed for that purpose. This work proposes a local optimization algorithm that generates compact decision graphs by performing local changes in an existing graph until a minimum is reached. The algorithm uses Rissanen's minimum description length principle to control the tradeoff between accuracy in the training set and complexity of the description. Techniques for the selection of the initial decision graph and for the selection of an appropriate ordering of the variables are also presented. Experimental results obtained using this algorithm in two sets of examples are presented and ...
⊕OBDDs  a BDD Structure for Probabilistic Verification
 IN PROC. OF THE PRELICS WORKSHOP ON PROBABILISTIC METHODS IN VERIFICATION (PROBMIV'98
, 1998
"... Ordered Binary Decision Diagrams (OBDDs) have already proved useful in the verification of combinational and sequential circuits. Due to limitations of the descriptive power of OBDDs several more general models of Binary Decision Diagrams have been studied. In this paper, ⊕OBDDs  also known as Mod ..."
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Cited by 6 (4 self)
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Ordered Binary Decision Diagrams (OBDDs) have already proved useful in the verification of combinational and sequential circuits. Due to limitations of the descriptive power of OBDDs several more general models of Binary Decision Diagrams have been studied. In this paper, ⊕OBDDs  also known as Mod2OBDDs  in respect to their ability to serve as a tool for combinational verification are considered. Besides the application of ⊕OBDDs, the more general problem of how to exploit the inherent potential of ⊕OBDDs more efficiently is addressed.
Ordered Binary Decision Diagrams and Their Significance in ComputerAided Design of VLSI Circuits  a Survey
, 1998
"... Many problems in computeraided design of highly integrated circuits (CAD for VLSI) can be transformed to the task of manipulating objects over finite domains. The efficiency of these operations depends substantially on the chosen data structures. In the last years, ordered binary decision diagra ..."
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Cited by 4 (0 self)
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Many problems in computeraided design of highly integrated circuits (CAD for VLSI) can be transformed to the task of manipulating objects over finite domains. The efficiency of these operations depends substantially on the chosen data structures. In the last years, ordered binary decision diagrams (OBDDs) have proven to be a very efficient data structure in this context. Here, we give a survey on these developments and stress the deep interactions between basic research and practically relevant applied research with its immediate impact on the performance improvement of modern CAD design and verification tools.
Satisfiability Problems for Ordered Functional Decision Diagrams
 Universitat Frankfurt
, 1996
"... In this paper we investigate the complexity of problems on Ordered Functional Decision Diagrams (OFDDs) related to satisfiability problems, i.e. SATONE, SATALL and SATCOUNT. We prove that SATALL has a running time linear in the product of the number of satisfying assignments, and the size of the ..."
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Cited by 3 (2 self)
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In this paper we investigate the complexity of problems on Ordered Functional Decision Diagrams (OFDDs) related to satisfiability problems, i.e. SATONE, SATALL and SATCOUNT. We prove that SATALL has a running time linear in the product of the number of satisfying assignments, and the size of the corresponding OFDD. Counting the satisfying assignments in an OFDD is proved to be #Pcomplete. I. Introduction The increasing complexity of modern VLSI circuitry is only manageable together with advanced CAD systems which as one important component contain (logic) synthesis tools. The problems to be solved can often be formulated in terms of Boolean functions. The efficiency of the representation and the manipulation algorithms performing (synthesis) operations largely depends on the type of data structure chosen. The most popular data structure is the Ordered Binary Decision Diagram (OBDD), which is a restricted form of a Binary Decision Diagram (BDD) [15, 1], also called branching progr...
Exact Minimization of Boolean Decision Diagrams Using Implicit Techniques
, 1996
"... This paper addresses the problem of Boolean decision diagram (BDD) minimization in the presence of don't care sets. Specifically, given an incompletely specified function g and a fixed ordering of the variables, we propose an exact algorithm for selecting f such that f is a cover for g and the ..."
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Cited by 3 (1 self)
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This paper addresses the problem of Boolean decision diagram (BDD) minimization in the presence of don't care sets. Specifically, given an incompletely specified function g and a fixed ordering of the variables, we propose an exact algorithm for selecting f such that f is a cover for g and the Boolean decision diagram for f is of minimum size. The approach described is the only known exact algorithm for this problem not based on explicit enumeration of all possible assignments for the points in the don't care set. We show that the BDD minimization problem can be formulated as a binate covering problem and solved using implicit enumeration techniques. In particular, we show that the minimumsized Boolean decision diagram compatible with the specification can be found by solving a problem that is very similar to the problem of reducing incompletely specified finite state machines. We report experiments of an implicit implementation of our algorithm, by means of which a class of interesti...