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Symbolic Boolean manipulation with ordered binarydecision diagrams
 ACM Computing Surveys
, 1992
"... Ordered BinaryDecision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as grap ..."
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Cited by 874 (11 self)
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Ordered BinaryDecision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as graph algorithms on OBDD
Symmetry Detection and Dynamic Variable Ordering of Decision Diagrams
, 1996
"... Knowing that some variables are symmetric in a function has numerous applications; in particular, it can help produce better variable orders for Binary Decision Diagrams (BDDs) and related data structures (e.g., Algebraic Decision Diagrams). It has been observed that there often exists an optimum ..."
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Cited by 54 (2 self)
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Knowing that some variables are symmetric in a function has numerous applications; in particular, it can help produce better variable orders for Binary Decision Diagrams (BDDs) and related data structures (e.g., Algebraic Decision Diagrams). It has been observed that there often exists an optimum order for a BDD wherein symmetric variables are contiguous. We propose a new algorithm for the detection of symmetries, based on dynamic reordering, and we study its interaction with the reordering algorithm itself. We show that combining sifting with an efficient symmetry check for contiguous variables results in the fastest symmetry detection algorithm reported to date and produces better variable orders for many BDDs. The overhead on the sifting algorithm is negligible. 1
BDD variable ordering for interacting finite state machines
 IN PROC. OF THE DESIGN AUTOMATION CONF
, 1994
"... We address the problem of obtaining good variable orderings for the BDD representation of a system of interacting finite state machines (FSMs). Orderings are derived from the communication structure of the system. Communication complexity arguments are used to prove upper bounds on the size of the B ..."
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Cited by 41 (7 self)
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We address the problem of obtaining good variable orderings for the BDD representation of a system of interacting finite state machines (FSMs). Orderings are derived from the communication structure of the system. Communication complexity arguments are used to prove upper bounds on the size of the BDD for the transition relation of the product machine in terms of the communication graph, and optimal orderings are exhibited for a variety of regular systems. Based on the bounds we formulate algorithms for variable ordering. We perform reached state analysis on a number of standard verification benchmarks to test the effectiveness of our ordering strategy; experimental results demonstrate the e cacy of our approach. The algorithms described in this paper have been implemented in HSIS, a hierarchical synthesis and verification tool currently under development at Berkeley.
Complexity of Problems on Graphs Represented as OBDDs
, 1999
"... To analyze the complexity of decision problems on graphs, one normally assumes that the input size is polynomial in the number of vertices. Galperin and Wigderson [GW83] and, later, Papadimitriou and Yannakakis [PY86] investigated the complexity of these problems when the input graph is represented ..."
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Cited by 15 (1 self)
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To analyze the complexity of decision problems on graphs, one normally assumes that the input size is polynomial in the number of vertices. Galperin and Wigderson [GW83] and, later, Papadimitriou and Yannakakis [PY86] investigated the complexity of these problems when the input graph is represented by a polylogarithmically succinct circuit. They showed that, under such a representation, certain trivial problems become intractable and that, in general, there is an exponential blow up in problem complexity. Later, Balc'azar, Lozan, and Tor'an [Bal96, BL89, BLT92, Tor88] extended these results to problems whose inputs were structures other than graphs. In this paper, we show that, when the input graph is represented by a ordered binary decision diagram (OBDD), there is an exponential blow up in the complexity of most graph problems. In particular, we show that the GAP and AGAP problems become complete for PSPACE and EXP, respectively, when the graphs are succinctly represented by OBDDs. 1...
Almana: A BDD Minimization Tool Integrating Heuristic and Rewriting Methods
 FORMAL METHODS IN COMPUTERAIDED DESIGN, SECOND INTERNATIONAL CNFERENCE, FMCAD '98
, 1998
"... Constructing a small BDD from a given boolean formula depends on finding a good variable ordering. Finding a good order is NPcomplete. In the past, methods based on heuristic analysis and formula (circuit) rewriting have shown to be useful for specific problem domains. We show that these method ..."
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Cited by 3 (0 self)
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Constructing a small BDD from a given boolean formula depends on finding a good variable ordering. Finding a good order is NPcomplete. In the past, methods based on heuristic analysis and formula (circuit) rewriting have shown to be useful for specific problem domains. We show that these methods need to be integrated: heuristic analysis can drive rewriting, which in turn simplifies analysis. We support this claim with experimental results, and describe Almana, an integrated tool for exploring the combination of analysis and rewriting on large boolean formulae.
Design of Dynamic PassTransistor Logic Circuits Using 123 Decision Diagrams
 IEEE Transactions on Circuits and SystemsI: Fundamental Theory and Applications
, 1998
"... Pass transistor logic (PTL) has advantages over standard CMOS designs in terms of layout density, circuit delay, and power consumption and is well suited for pipelined circuits. In this paper we develop a decisiondiagrambased model, the 123decision diagram, which can be used to efficiently synthe ..."
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Cited by 1 (0 self)
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Pass transistor logic (PTL) has advantages over standard CMOS designs in terms of layout density, circuit delay, and power consumption and is well suited for pipelined circuits. In this paper we develop a decisiondiagrambased model, the 123decision diagram, which can be used to efficiently synthesize PTL circuits, and we investigate multilevel logic synthesis techniques for complex, pipelined PTL networks using this model. Experiments on a large number of benchmark circuits show that PTL networks synthesized using our techniques are significantly more economic in terms of silicon area compared to those using existing techniques.
Binary Decision Diagrams and Applications for Reliability Analysis
, 2000
"... This thesis investigates practical and theoretical concerns for the use of Binary Decision Diagrams (BDDs) for qualitative and quantitative risk assessments of complex systems. Boolean models describing failure relationships between components, and fault trees in particular, are boolean formulas who ..."
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This thesis investigates practical and theoretical concerns for the use of Binary Decision Diagrams (BDDs) for qualitative and quantitative risk assessments of complex systems. Boolean models describing failure relationships between components, and fault trees in particular, are boolean formulas whose variables are individual component failures; assessment of these models can be performed by analysis of the boolean function induced by the formula. Resource consumption for BDD computations, which is determined by the form of the boolean formula and the order imposed on its variables, is in many cases exponentially smaller than the truth table for the function. The use of Binary Decision Diagrams has made possible ordersofmagnitude increases in the complexity of systems that can be assessed efficiently. Nonetheless, the practical limits of straightforward use of BDDs for reliability analysis are often surpassed by realworld systems. Understanding why this happens is the first subject...