A new technique for generating approximate symbolic expressions for network functions in linear(ized) analog circuits is presented. It is based on the compact determinant decision diagram (DDD) representation of the circuit. An implementation of a term generation algorithm is given and its performance is compared to a matroidbased algorithm. Experimental results indicate that our approach is the fastest reported algorithm so far for this application.

This paper presents a novel method to automatically generate symbolic expressions for both linear and nonlinear circuit characteristics using a template-based fitting of numerical, simulated data. The aim of the method is to generate convex, interpretable expressions. The posynomiality of the generated expressions enables the use of efficient geometric programming techniques when using these expressions for circuit sizing and optimization. Attention is paid to estimating the relative `goodness-of-fit' of the generated expressions. Experimental results illustrate the capabilities of the approach.

This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state-of-the-art in this field is also studied, pointing out directions for future research. 1. INTRODUCTION Circuit analysis is a basic milestone for efficient design of integrated circuits. Ever since powerful computers have been available, designers have developed programs to analyze circuits automatically. Today, all electrical engineering professionals and students use electrical simulators (such as HSPICE or ELDO). However, electrical simulators do not cover all the analysis tasks required for integrated circuit design. Essentially, they only serve to verify the performance of previously sized circuits. Among other things, designers must be able to predict the behavior of unsized circuits by tracing relationships among performance figures and design parameters. These relationships may be in the form of transfer functions, poles and ...

The EASY analog design system includes a qualitative analysis tool for examination of the principal aptitude of a chosen circuit structure, as well as a symbolic analysis component. It allows the deduction of compact but sufficiently accurate design equations. These tools support the first steps of the design process and give insight in the behavior of the analog circuit.

www.itwm.fraunhofer.de Abstract — Micro-electronics component and circuit design requires long computation time; to reduce this time, the use of simplification techniques has been introduced. In order to obtain a first validation of the method, a first test case is presented; the simplification techniques have been applied to the analytical expression of Y parameters of an inductor equivalent circuit. The resulting expressions have been used in the fitting process in order to reproduce the behaviour of a simulated inductor. Five different optimization algorithms, both deterministic (POWELL and DIRECT) and stochastic (CRS, CRS ENHANCED and OPTIA) have been tested for the fitting. The result of the introduction of the simplification techniques has been the reduction of the running time during the fitting. From an optimization point of view, the best results have been obtained by the stochastic algorithms CRS, and OPTIA. I.