A con.curren.t object is a data structure shared by concurrent processes. Conventional techniques for implementing concurrent objects typically rely on criticaI sections: ensuring that only one process at a time can operate on the object. Nevertheless, critical sections are poorly suited for asynchronous systems: if one process is halted or delayed in a critical section, other, non-faulty processes will be unable to progress. By contrast, a concurrent object implementation is non-blocking if it always guarantees that some process will complete an operation in a finite number of steps, and it is wait-free if it guarantees that each process will complete an operation in a finite number of steps. This paper proposes a new methodology for constructing non-blocking aud wait-free implementations of concurrent objects. The object’s representation and operations are written as st,ylized sequential programs, with no explicit synchronization. Each sequential operation is automatically transformed into a non-blocking or wait-free operation usiug novel synchronization and memory management algorithms. These algorithms are presented for a multiple instruction/multiple data (MIM D) architecture in which n processes communicate by applying read, write, and comparekYswa,p operations to a shared memory. 1

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We present a new specification for distributed data services that trade-off immediate consistency guarantees for improved system availability and efficiency, while ensuring the long-term consistency of the data. An eventualIy-serializable data service maintains the operations requested in a partial order that gravitates over time towards a total order. It provides clear and unambiguous guarantees about the immediate and long-term behavior of the system. To demonstrate its utility, we present an algorithm, based on one of Ladin, Liskov, Shrira, and Ghemawat [12], that implements this specification. Our algorithm provides the interface of the abstract service, and generalizes their algorithm by allowing general operations and greater flexibility in specifying consistency requirements. We also describe how to use this specification as a building block for applications such as directory services.

Parallel computing on a network of workstations can saturate the communication network, leading to excessive message delays and consequently poor application performance. We examine empirically the consequences of integrating a flow control protocol, called Warp control [Par93], into Mermera, a software shared memory system that supports parallel computing on distributed systems [HS93]. For an

We present a novel approach to parallel computing in a workstation environment. We introduce Replicated Shared Objects as a programming paradigm which allows encapsulation of communication and synchronization operations within an object’s implementation. It also provides an easy-to-use interface to the application programmer. Shared Objects Memory implements our programming paradigm as an object-based, replicated distributed shared memory system on top of network-transparent communication in the Mach operating system. Together with a Remote Execution Service it provides a complete environment for execution of shared-memory parallel programs in workstation clusters. Our system allows for definition and configuration of a virtual parallel machine called ‘‘Shared Objects Net-interconnected Computer’ ’ within such a cluster through an easy-to-use graphical interface. Besides a description of our programming paradigm and the ‘‘Shared Objects Net-interconnected Computer’ ’ this paper includes promising runtime statistics from early experiments, showing that a cluster of four lowend workstations may have comparable performance with a four-processor shared memory multicomputer such as Sequent Balance.

The concept of legality is a crucial one for the denition of many shared-memory consistency conditions. As originally dened, a sequence of operations on a given object is legal if it is in the set of valid sequences specied for that object. Being thus dened on totally ordered sets of operations, the notion of legality is not fully realistic, because parallel executions on sharedmemory multiprocessing systems are best represented by partially ordered sets of operations. It is conceivable, therefore, that the eventual derivation of practical systems based on consistency models that rely on some form of legality will tend to be excessively heavy on the required synchronization. In this paper, we introduce an alternative denition of legality that is based on partially ordered sets of operations. Our treatment starts with a system model that makes very few assumptions on machine architecture, and proceeds to employ a graph-theoretic formalism to handle the normally troublesome issue of write multiplicity and to characterize legality. Using this same formalism, we argue that the novel denition of legality is consonant with the one on totally ordered sets of operations, so it carries the same intuitive appeal intended by the original denition. Keywords: Shared Memory, Legality, Consistency Models, Distributed Computing. 1 1

The problem of verifying finite-state models of shared memory multiprocessor coherence protocols for conformance to weaker memory consistency models is examined. We start with W.W. Collier's architectural testing methods and extend it in several non-trivial ways in order to be able to handle weaker memory models. This, our first contribution, presents the construction of architectural testing programs similar to those constructed by Collier (e.g. the Archtest suite) suited for weaker memory models. Our own primary emphasis has, however, been to adapt these methods to the realm of model-checking. In an earlier effort (joint work with Nalumasu and Mokkedem), we had demonstrated how to adapt Collier's architectural testing methods to model-checking. Our verification approach consisted of abstracting executions that violate memory orderings into a fixed collection of automata (called Test Automata) that depend only on the memory model. The main advantage of this approach, called Test Model-checking, is that the test automata remain xed during the iterative design cycle when di erent coherence protocols that (presumably) implement a given memory model are being compared for performance. This facilitates `push-button' re-verification when each new protocol is being considered. Our second contribution is to extend the methods of constructing test automata to be able to handle architectural tests for weaker memory models. After reviewing prior work, in this paper we mainly focus on architectural tests for weaker memory models and the new abstraction methods thereof to construct test automata for weaker memory models.