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Lava: Hardware Design in Haskell
, 1998
"... Lava is a tool to assist circuit designers in specifying, designing, verifying and implementing hardware. It is a collection of Haskell modules. The system design exploits functional programming language features, such as monads and type classes, to provide multiple interpretations of circuit descri ..."
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Cited by 96 (7 self)
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Lava is a tool to assist circuit designers in specifying, designing, verifying and implementing hardware. It is a collection of Haskell modules. The system design exploits functional programming language features, such as monads and type classes, to provide multiple interpretations of circuit descriptions. These interpretations implement standard circuit analyses such as simulation, formal veri#cation and the generation of code for the production of real circuits.
Designing Arithmetic Circuits by Refinement in Ruby
- In Proc. Second International Conference on Mathematics of Program Construction, Lecture Notes in Computer Science
, 1992
"... . This paper presents in some detail the systematic derivation of a static bit-level parallel algorithm to implement multiplication of integers, that is to say one which might be implemented as an electronic circuit. The circuit is well known, but the derivation shows that its design can be seen as ..."
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Cited by 24 (0 self)
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. This paper presents in some detail the systematic derivation of a static bit-level parallel algorithm to implement multiplication of integers, that is to say one which might be implemented as an electronic circuit. The circuit is well known, but the derivation shows that its design can be seen as the consequence of decisions made (and explained) in terms of the abstract algorithm. The systematic derivation serves both as an explanation of the circuit, and as a demonstration that it is correct `by construction'. We believe that the technique is applicable to a wide range of similar algorithms. 1 Introduction We advocate a style of `design by calculation' for the very fine-grained parallel algorithms that are implemented as regular arrays of electronic circuits. The design of such circuits is particularly difficult because the implementation medium imposes severe constraints on what is possible and what is reasonably efficient. In consequence the details of the final implementation ha...
Relations and Refinement in Circuit Design
- Proc. BCS FACS Workshop on Refinement, Workshops in Computing
, 1991
"... A language of relations and combining forms is presented in which to describe both the behaviour of circuits and the specifications which they must meet. We illustrate a design method that starts by selecting representations for the values on which a circuit operates, and derive the circuit from the ..."
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Cited by 21 (1 self)
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A language of relations and combining forms is presented in which to describe both the behaviour of circuits and the specifications which they must meet. We illustrate a design method that starts by selecting representations for the values on which a circuit operates, and derive the circuit from these representations by a process of refinement entirely within the language. Formal methods have always been used in circuit design. It would be unthinkable to attempt to design combinational circuits without using Boolean algebra. This means that circuit designers, unlike programmers, already use mathematical tools as a matter of course. It also means that we have a good basis on which to build higher level formal design methods. Encouraged by these observations, we have been investigating the application of formal program development techniques to circuit design. We view circuit design as the transformation of a program describing the required behaviour into an equivalent program that is s...
A Tutorial on Lava: A Hardware Description and Verification System
, 2000
"... Contents 1 Introduction 4 2 Getting Started 6 2.1 Your First Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 The Lava Interpreter . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Your Second Circuit . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Generating VHDL . . ..."
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Cited by 20 (6 self)
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Contents 1 Introduction 4 2 Getting Started 6 2.1 Your First Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 The Lava Interpreter . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Your Second Circuit . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Generating VHDL . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Bigger Circuits 12 3.1 Recursion over Lists . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 Connection Patterns . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3 Arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4 Compilation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.5 Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Verification 18 4.1 Simple Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 Quanti
Embedded Languages for Describing and Verifying Hardware
, 2001
"... Abstract Lava is a system for designing, specifying, verifying and implementing hardware. It is embedded in the functional programming language Haskell, which means that hardware descriptions are first-class objects in Haskell. We are thus able to use modern programming language features, such as hi ..."
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Cited by 17 (2 self)
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Abstract Lava is a system for designing, specifying, verifying and implementing hardware. It is embedded in the functional programming language Haskell, which means that hardware descriptions are first-class objects in Haskell. We are thus able to use modern programming language features, such as higher-order functions, polymorphism, type classes and laziness, in hardware descriptions. We present two rather different versions of Lava. One version realises the embedding by using monads to keep track of the information specified in a hardware description. The other version uses a new language construct, called observable sharing, which eliminates the need for monads so that descriptions are much cleaner. Adding observable sharing to Haskell is a non-conservative extension, meaning that some properties of Haskell are lost. We thus investigate to what extent we are still allowed to use a normal Haskell compiler or interpreter. We also introduce an embedded language for specifying properties. The use of this language is two-fold. On the one hand, we can use it to specify and later formally verify properties of the described circuits. On the other hand, we can use it to specify and randomly test properties of normal Haskell programs. As a bonus, since hardware descriptions are embedded in Haskell, we can also use it to test our circuit descriptions.
Computer-Based Tools For Regular Array Design
- in Systolic Array Processors
, 1989
"... . We present an overview of a prototype system based on a functional language for developing regular array circuits. The features of a simulator, floorplanner and expression transformer are discussed and illustrated. INTRODUCTION Implementing algorithms on a regular array of processors has many ad ..."
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Cited by 16 (8 self)
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. We present an overview of a prototype system based on a functional language for developing regular array circuits. The features of a simulator, floorplanner and expression transformer are discussed and illustrated. INTRODUCTION Implementing algorithms on a regular array of processors has many advantages. Besides offering an efficient realisation of parallel structures, regular patterns of interconnections also provide an opportunity for simplifying their description and their development. Various approaches for regular array design have been proposed; examples include methods based on dependence graphs [5], recurrence equations [14], and algebraic techniques [16]. This paper presents an overview of a prototype system for regular array development. The system is based on ¯FP [15], a functional language with mechanisms for abstracting spatial and temporal iteration. These abstractions result in a succinct and precise notation for specifying designs. Moreover, the explicit representat...
Realtime Signal Processing -- Dataflow, Visual, and Functional Programming
, 1995
"... This thesis presents and justifies a framework for programming real-time signal processing systems. The framework extends the existing "block-diagram" programming model; it has three components: a very high-level textual language, a visual language, and the dataflow process network model of computat ..."
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Cited by 13 (1 self)
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This thesis presents and justifies a framework for programming real-time signal processing systems. The framework extends the existing "block-diagram" programming model; it has three components: a very high-level textual language, a visual language, and the dataflow process network model of computation. The dataflow process network model, although widely-used, lacks a formal description, and I provide a semantics for it. The formal work leads into a new form of actor. Having established the semantics of dataflow processes, the functional language Haskell is layered above this model, providing powerful features---notably polymorphism, higher-order functions, and algebraic program transformation---absent in block-diagram systems. A visual equivalent notation for Haskell, Visual Haskell, ensures that this power does not exclude the "intuitive" appeal of visual interfaces; with some intelligent layout and suggestive icons, a Visual Haskell program can be made to look very like a block dia...
A verifying core for a cryptographic language compiler
- In Manolios, P., Wilding, M., eds.: 6th ACL2 Workshop. (2006
, 2006
"... A verifying compiler is one that emits both object code and a proof of correspondence between object and source code. 1 We report the use of ACL2 in building a verifying compiler for µCryptol, a stream-based language for encryption algorithm specification that targets Rockwell Collins’ AAMP7 micropr ..."
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Cited by 12 (2 self)
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A verifying compiler is one that emits both object code and a proof of correspondence between object and source code. 1 We report the use of ACL2 in building a verifying compiler for µCryptol, a stream-based language for encryption algorithm specification that targets Rockwell Collins’ AAMP7 microprocessor (and is designed to compile efficiently to hardware, too). This paper reports on our success in verifying the “core ” transformations of the compiler – those transformations over the sub-language of µCryptol that begin after “higher-order ” aspects of the language are compiled away, and finish just before hardware or software specific transformations are exercised. The core transformations are responsible for aggressive optimizations. We have written an ACL2 macro that automatically generates both the correspondence theorems and their proofs. The compiler also supplies measure functions that ACL2 uses to automatically prove termination of µCryptol programs, including programs with mutually-recursive cliques of streams. Our verifying compiler has proved the correctness of its core transformations for multiple algorithms, including TEA, RC6, and AES. Finally, we describe an ACL2 book of primitive operations for the general specification and verification of encryption algorithms. Categories and Subject Descriptors D.2.4 [Software Engineering]: Software/Program Verification—correctness proofs, formal methods, reliability; D.3.4 ∗ The ACL2 books associated with this paper can be retrieved at
Timeless Truths about Sequential Circuits
- Concurrent Computations: Algorithms, Architectures and Technology
, 1988
"... We suggest the use of a declarative programming language to design and describe circuits, concentrating on the use of higher-order functions to structure and simplify designs. In order to describe sequential circuits, we use a language, ¯fp, which abstracts from temporal iteration. The practicaliti ..."
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Cited by 10 (1 self)
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We suggest the use of a declarative programming language to design and describe circuits, concentrating on the use of higher-order functions to structure and simplify designs. In order to describe sequential circuits, we use a language, ¯fp, which abstracts from temporal iteration. The practicalities of vlsi design make regularity attractive, and we describe the use of familiar higher order functions to capture spatial iteration. By reasoning about circuits rather than signals (programs rather than data) one abstracts from the sequential nature of a circuit. By reasoning about forms of circuit (higher order functions) one can devise implementation strategies for whole classes of algorithms. Reasoning about ¯fp is formally quite similar to reasoning about fp. In this paper we identify the semantic content of the formal similarity between fp and ¯fp. This makes it possible to carry over from conventional functional programming those intuitions we have about algorithm design. It also m...
Hardware Description with Recursion Equations
- In Proceedings of the IFIP 8th International Symposium on Computer Hardware Description Languages and their Applications
, 1987
"... this paper develops such a scheme, called "hardware description with recursion equations" (abbreviated HDRE and pronounced as hydra). A designer using HDRE may describe a circuit using a simple set of primitive functions written in an underlying general purpose programming language, and the descript ..."
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Cited by 8 (3 self)
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this paper develops such a scheme, called "hardware description with recursion equations" (abbreviated HDRE and pronounced as hydra). A designer using HDRE may describe a circuit using a simple set of primitive functions written in an underlying general purpose programming language, and the description itself is just a function written in that language. Executing a circuit description function provides its meaning --- its semantic content.

