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The Warp Computer: Architecture, Implementation, and Performance
- IEEE Transactions on Computers
, 1987
"... The Warp machine is a systolic array computer of linearly connected cells, each of which is a programmable processor capable of performing 10 million floating-point operations per second (10 MFLOPS). A typical Warp array includes 10 cells, thus having a peak computation rate of 100 MFLOPS. The Warp ..."
Abstract
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Cited by 42 (2 self)
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The Warp machine is a systolic array computer of linearly connected cells, each of which is a programmable processor capable of performing 10 million floating-point operations per second (10 MFLOPS). A typical Warp array includes 10 cells, thus having a peak computation rate of 100 MFLOPS. The Warp array can be extended to include more cells to accommodate applications capable of using the increased computational bandwidth. Warp is integrated as an attached processor into a UN host system. Programs for Warp are written in a high-level language supported by an optimizing compiler.
Object Recognition on a Systolic Array
, 1987
"... Computer vision systems for recognition include both the extraction of features and the matching of those features with a known model. Traditionally, the most time consuming step has been feature extraction, but new parallel architectures are removing the bottleneck at this level. Once features have ..."
Abstract
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Computer vision systems for recognition include both the extraction of features and the matching of those features with a known model. Traditionally, the most time consuming step has been feature extraction, but new parallel architectures are removing the bottleneck at this level. Once features have been extracted from an image considerable geometric search is still necessary to form relationships between the extracted features and to match those features and feature aggregates with a model. One can take advantage of certain constraints about the appearance of an object, but with complex images or multiple models intensive processing is still required. We have developed some algorithms for doing these geometric search operations in parallel on iWarp, a long linear array of VLSI processing elements currently being designed by Carnegie Mellon and Intel Corporation. We have simulated a system which uses these algorithms to do an object recognition task (after low-level vision) almost completely on a 72 processor iWarp array. An analysis of this system indicates a speedup by a factor of roughly 100 to 250 over a sequential version running on a VAX 8650. A common paradigm for computer vision recognition systems, which was originally used by Roberts [10] is: 1. Extract features from an image.
A MODIFIED SIMULATION ENVIRONMENT FOR RECONFIGURABLE MULTICOMPUTER SYSTEMS IN DIGITAL IMAGE PROCESSING APPLICATIONS
"... In our work we improve the EPPI programming environment, which was made in the University of Castilla- la Mancha one year ago. EPPI is a tool for simulating parallel algorithms that runs on a monoprocessor standar computer under the Unix operating system, what makes it easily transportable. This env ..."
Abstract
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In our work we improve the EPPI programming environment, which was made in the University of Castilla- la Mancha one year ago. EPPI is a tool for simulating parallel algorithms that runs on a monoprocessor standar computer under the Unix operating system, what makes it easily transportable. This environment provides a set of tools oriented to digital image processing, whereby it is very adequate for performance stidies of parallel architectures and algorithms. Although it was first built to sumulate NETRA architecture [I], it can now admit different topologies, shared/distributed memory configurations and a variable number of processors with floating point capacity and several simulation parameters, providing also information about execution of the algorithm, allowing capacities of debugging and optimization. In this paper, our shows the tool EPPI with a comparison module which allow to compare different architectures and algorithms.

