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59
NanoFabrics: Spatial Computing Using Molecular Electronics
"... The continuation of the remarkable exponential increases in processing power over the recent past faces imminent challenges due in part to the physics of deepsubmicron CMOS devices and the costs of both chip masks and future fabrication plants. A promising solution to these problems is offered by a ..."
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Cited by 131 (10 self)
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The continuation of the remarkable exponential increases in processing power over the recent past faces imminent challenges due in part to the physics of deepsubmicron CMOS devices and the costs of both chip masks and future fabrication plants. A promising solution to these problems is offered by an alternative to CMOSbased computing, chemically assembled electronic nanotechnology (CAEN). In this paper we outline how CAENbased computing can become a reality. We briefly describe recent work in CAEN and how CAEN will affect computer architecture. We show how the inherently reconfigurable nature of CAEN devices can be exploited to provide highdensity chips with defect tolerance at significantly reduced manufacturing costs. We develop a layered abstract architecture for CAENbased computing devices and we present preliminary results which indicate that such devices will be competitive with CMOS circuits.
Exploring and exploiting wirelevel pipelining in emerging technologies
 In Proceedings of the 28th Annual International Symposium on Computer Architecture
, 2001
"... Pipelining is a technique that has long since been considered fundamental by computer architects. However, the world of nanoelectronics is pushing the idea of pipelining to new and lower levels – particularly the device level. How this affects circuits and the relationship between their timing, arch ..."
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Cited by 23 (9 self)
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Pipelining is a technique that has long since been considered fundamental by computer architects. However, the world of nanoelectronics is pushing the idea of pipelining to new and lower levels – particularly the device level. How this affects circuits and the relationship between their timing, architecture, and design will be studied in the context of an inherently selflatching nanotechnology termed Quantum Cellular Automata (QCA). Results indicate that this nanotechnology offers the potential for “free ” multithreading and “processinginwire”. All of this could be accomplished in a technology that could be almost three orders of magnitude denser than an equivalent design fabricated in a process at the end of the CMOS curve. 1.
A Potentially Implementable FPGA for Quantum Dot Cellular Automata
 Automata”, 1st Workshop on NonSilicon Computation (NSC1
, 2002
"... While still relatively "new", the quantumdot cellular automata (QCA) appears to be able to provide many of the properties and functionalities that have made CMOS successful over the past several decades. Early experiments have demonstrated and realized most, if not all, of the "fundamentals " neede ..."
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Cited by 18 (0 self)
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While still relatively "new", the quantumdot cellular automata (QCA) appears to be able to provide many of the properties and functionalities that have made CMOS successful over the past several decades. Early experiments have demonstrated and realized most, if not all, of the "fundamentals " needed for a computational circuit  devices, logic gates, wires, etc. This study introduces the beginning of a next step in experimental work: designing a computationally useful  yet simple and fabricatable circuit for QCA. The design target is a QCA Field Programmable Gate Array.
Memory in Motion: A Study of Storage Structures in QCA
 in QCA”, First Workshop on NonSilicon Computing
, 2002
"... Quantum Cellular Automata (QCA) is a new technology that replaces current flow as an information carrier by coulombic interactions of electrons within confined configurations. Prior work has investigated its potential as very dense logic. This paper uses a defining characteristic of such devices, na ..."
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Cited by 15 (1 self)
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Quantum Cellular Automata (QCA) is a new technology that replaces current flow as an information carrier by coulombic interactions of electrons within confined configurations. Prior work has investigated its potential as very dense logic. This paper uses a defining characteristic of such devices, namely pipelining that occurs even at the wire level, as the mechanism for memory structures that are formed recursively, rather than as conventional CMOS arrays, and hold the potential for extremely dense storage with embedded processing capabilities.
Overview of Nanoelectronic Devices
 Proceedings of the IEEE
, 1997
"... This paper provides an overview of research developments toward nanometerscale electronic switching devices for use in building ultradensely integrated electronic computers. Specifically, two classes of alternatives to the fieldeffect transistor are considered: 1) quantumeffect and singleelectr ..."
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Cited by 11 (1 self)
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This paper provides an overview of research developments toward nanometerscale electronic switching devices for use in building ultradensely integrated electronic computers. Specifically, two classes of alternatives to the fieldeffect transistor are considered: 1) quantumeffect and singleelectron solidstate devices and 2) molecular electronic devices. A taxonomy of devices in each class is provided, operational principles are described and compared for the various types of devices, and the literature about each is surveyed. This information is presented in nonmathematical terms intended for a general, technically interested readership
Computation by asynchronously updating cellular automata
 Journal of Statistical Physics
, 2004
"... Abstract. A known method to compute on an asynchronously updating cellular automaton is the simulation of a synchronous computing model on it. Such a scheme requires not only an increased number of cell states, but also the simulation of a global synchronization mechanism. Asynchronous systems tend ..."
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Cited by 9 (4 self)
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Abstract. A known method to compute on an asynchronously updating cellular automaton is the simulation of a synchronous computing model on it. Such a scheme requires not only an increased number of cell states, but also the simulation of a global synchronization mechanism. Asynchronous systems tend to use synchronization only on a local scale—if they use it at all. Research on cellular automata that are truly asynchronous has been limited mostly to trivial phenomena, leaving issues such as computation unexplored. This paper presents an asynchronously updating cellular automaton that conducts computation without relying on a simulated global synchronization mechanism. The 2dimensional cellular automaton employs a Mooreneighborhood and 85 totalistic transition rules describing the asynchronous interactions between the cells. Despite the probabilistic nature of asynchronous updating, the outcome of the dynamics is deterministic. This is achieved by simulating delay insensitive circuits on it, a type of asynchronous circuit that is known for its robustness to variations in the timing of signals. We implement three primitive operators on the cellular automaton from which any arbitrary delay insensitive circuit can be constructed, and show how to connect the operators such that collisions of crossing signals are avoided.
Logic in wire: Using quantum dots to implement a microp rocessor
 In Proceedings of 6th International Conference on Electronics, Circuits and Systems
, 1999
"... Despite the seemingly endless upwards spiral of modern VLSI technology, many experts are predicting a hard wall for CMOS in about a decade. Given this, researchers continue to look at alternative technologies, one of which is based on quantum dots, called quantum cellular automata. While the first s ..."
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Cited by 6 (1 self)
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Despite the seemingly endless upwards spiral of modern VLSI technology, many experts are predicting a hard wall for CMOS in about a decade. Given this, researchers continue to look at alternative technologies, one of which is based on quantum dots, called quantum cellular automata. While the first such devices have been fabricated, little is known about how to design complete systems of them. This paper summarizes one of the first such studies, namely an attempt to design a complete, albeit simple, CPU in the technology. The projections are striking: a projected 10to1 increase in circuit density when compared to an end of the CMOS curve equivalent, but a design approach which is radically different from conventional "logic " design, especially in timing considerations. 1.
Computer Arithmetic Structures for Quantum Cellular Automata
 in Conf. Rec. 37th Asilomar Conf. Signals, Systems and Computers
, 2003
"... In this paper, we discuss arithmetic structures based on quantum cellular automata (QCA). By taking advantage of the unique capabilities of QCA we are able to design interesting computational architectures. We describe important design considerations and show how addition and multiplication circuits ..."
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Cited by 6 (1 self)
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In this paper, we discuss arithmetic structures based on quantum cellular automata (QCA). By taking advantage of the unique capabilities of QCA we are able to design interesting computational architectures. We describe important design considerations and show how addition and multiplication circuits can be implemented using QCADesigner, a QCA design tool which has been developed in our laboratory. QCA technology allows, among other things, the implementation of majority boolean gates and interconnecting "wires" that support crossovers on the same fabrication level. One of the important challenges with QCA design is working within a different cost function from standard transistor circuits. These differences arise from the device level latching inherent in QCA. This latching makes the total delay of a circuit directly proportional to the maximum number of clocking zones between input and output and the number of gates.
Eliminating wire crossings for molecular quantumdot cellular automata implementation
 ICCAD
, 2005
"... Abstract — When exploring computing elements made from technologies other than CMOS, it is imperative to investigate the effects of physical implementation constraints. This paper focuses on molecular Quantumdot Cellular Automata circuits. For these circuits, it is very difficult for chemists to fa ..."
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Cited by 6 (5 self)
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Abstract — When exploring computing elements made from technologies other than CMOS, it is imperative to investigate the effects of physical implementation constraints. This paper focuses on molecular Quantumdot Cellular Automata circuits. For these circuits, it is very difficult for chemists to fabricate wire crossings (at least in the near future). A novel technique is introduced to remove wire crossings in a given circuit to facilitate the self assembly of real circuits – thus providing meaningful and functional design targets for both physical and computer scientists. The technique eliminates all wire crossings with minimal logic gate/node duplications. Experimental results based on existing QCA circuits and other benchmarks are quite encouraging, and suggest that further investigation is needed. I.
Universal DelayInsensitive Circuits with Bidirectional and Buffering Lines
 IEEE Transactions on Computers
, 2004
"... Abstract — DelayInsensitive (DI) circuits are a class of asynchronous circuits, whose correctness of operation is robust to arbitrary delays in modules or interconnection lines. Keller clarified the precise operating conditions of the class of DIcircuits, and presented a universal set of primitive ..."
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Cited by 5 (2 self)
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Abstract — DelayInsensitive (DI) circuits are a class of asynchronous circuits, whose correctness of operation is robust to arbitrary delays in modules or interconnection lines. Keller clarified the precise operating conditions of the class of DIcircuits, and presented a universal set of primitive modules from which any circuit in the class is realizable. Later, Patra presented an alternative universal set of primitive modules, and claimed that there is no universal set of primitives satisfying Keller’s conditions, in which the largest number of input and output lines of each primitive module is less than five. In this paper, we present new types of primitive modules, each having at most three input and outputlines. and show they form a universal set of primitives. We achieve this reduction in complexity by allowing the input and outputlines of modules to be bidirectional and to be able to buffer signals. The use of buffers in interconnection lines allows higher throughput of signals and results in circuits requiring less feedback lines, thus improving the efficiency of DIcircuits. The proposed class of DIcircuits is especially useful for implementations on cellular automata—an architecture that promises efficient implementations and manufacturing in nanotechnology due to its regular structure. Index Terms — asynchronous systems, delayinsensitive circuits, module, universality, bidirectional buffering lines I.