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159
Efficient linear circuit analysis by Pade’ approximation via the Lanczos process
 IEEE Trans. ComputerAided Design
, 1995
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A CoordinateTransformed Arnoldi Algorithm for Generating Guaranteed Stable ReducedOrder Models of RLC Circuits
, 1996
"... Since the first papers on asymptotic waveform evaluation (AWE), Padébased reducedorder models have become standard for improving coupled circuitinterconnect simulation efficiency. Such models can be accurately computed using biorthogonalization algorithms like Padé via Lanczos (PVL), but the res ..."
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Cited by 85 (20 self)
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Since the first papers on asymptotic waveform evaluation (AWE), Padébased reducedorder models have become standard for improving coupled circuitinterconnect simulation efficiency. Such models can be accurately computed using biorthogonalization algorithms like Padé via Lanczos (PVL), but the resulting Padé approximates can still be unstable even when generated from stable RLC circuits. For certain classes of RC circuits it has been shown that congruence transforms, like the Arnoldi algorithm, can generate guaranteed stable and passive reducedorder models. In this paper we present a computationally efficient modelorder reduction technique, the coordinatetransformed Arnoldi algorithm, and show that this method generates arbitrarily accurate and guaranteed stable reducedorder models for RLC circuits. Examples are presented which demonstrates the enhanced stability and efficiency of the new method.
Krylov Subspace Techniques for ReducedOrder Modeling of Nonlinear Dynamical Systems
 Appl. Numer. Math
, 2002
"... Means of applying Krylov subspace techniques for adaptively extracting accurate reducedorder models of largescale nonlinear dynamical systems is a relatively open problem. There has been much current interest in developing such techniques. We focus on a bilinearization method, which extends Kry ..."
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Cited by 80 (5 self)
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Means of applying Krylov subspace techniques for adaptively extracting accurate reducedorder models of largescale nonlinear dynamical systems is a relatively open problem. There has been much current interest in developing such techniques. We focus on a bilinearization method, which extends Krylov subspace techniques for linear systems. In this approach, the nonlinear system is first approximated by a bilinear system through Carleman bilinearization. Then a reducedorder bilinear system is constructed in such a way that it matches certain number of multimoments corresponding to the first few kernels of the VolterraWiener representation of the bilinear system. It is shown that the twosided Krylov subspace technique matches significant more number of multimoments than the corresponding oneside technique.
Efficient ReducedOrder Modeling of FrequencyDependent Coupling Inductances associated with 3D Interconnect Structures
, 1994
"... Reducedorder modeling techniques are now commonly used to efficiently simulate circuits combined with interconnect, but generating reducedorder models from realistic 3D structures has received less attention. In this paper we describe a Krylovsubspace based method for deriving reducedorder mode ..."
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Cited by 65 (13 self)
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Reducedorder modeling techniques are now commonly used to efficiently simulate circuits combined with interconnect, but generating reducedorder models from realistic 3D structures has received less attention. In this paper we describe a Krylovsubspace based method for deriving reducedorder models directly from the 3D magnetoquasistatic analysis program FastHenry. This new approach is no more expensive than computing an impedance matrix at a single frequency.
Reducedorder modeling techniques based on Krylov subspaces and their use in circuit simulation
 in Applied and Computational Control, Signals, and Circuits
, 1999
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How to efficiently capture onchip inductance effects: introducing a new circuit element K
 In Proc. Int. Conf. on Computer Aided Design
, 2000
"... Onchip inductance extraction and analysis is becoming increasing critical. Inductance extraction can be difficult, cumbersome and impractical on large designs as inductance depends on the current return path — which is typically unknown prior to extracting and simulating the circuit model. In th ..."
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Cited by 51 (1 self)
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Onchip inductance extraction and analysis is becoming increasing critical. Inductance extraction can be difficult, cumbersome and impractical on large designs as inductance depends on the current return path — which is typically unknown prior to extracting and simulating the circuit model. In this paper, we propose a new circuit element, K, to model inductance effects, at the same time being easier to extract and analyze. K is defined as inverse of partial inductance matrix L, and has locality and sparsity normally associated with a capacitance matrix. We propose to capture inductance effects by directly extracting and simulating K, instead of partial inductance, leading to much more efficient procedure which is amenable to full chip extraction. This proposed approach has been verified through several simulation results. 1
ReturnLimited Inductances: A Practical Approach to OnChip Inductance Extraction
, 1999
"... Decreasing slew rates and efforts to reduce the RC delays of onchip interconnect through design and technology have resulted in the growing importance of inductance in analyzing interconnect response for timing and noise analysis. In this paper, we consider a practical approach for extracting appro ..."
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Cited by 30 (3 self)
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Decreasing slew rates and efforts to reduce the RC delays of onchip interconnect through design and technology have resulted in the growing importance of inductance in analyzing interconnect response for timing and noise analysis. In this paper, we consider a practical approach for extracting approximate inductances of onchip interconnect. This approach, which we call the method of returnlimited inductances, is based on performing the inductance modelling of signal lines and powerground lines independently and on taking advantage of the power and ground distribution of the chip to localize inductive coupling. A set of simple geometrybased matrix decomposition rules guide sparsification in these extractions. Keywords inductance, parasitic extraction, signal integrity I. Introduction W ITH technology scaling, chips consist of more interconnect wires of smaller cross sections packed closer together. As a result, RC delays have become an important performance limitation, and cap...
Error estimation of the Pad'e approximation of transfer functions via the Lanczos process
 Trans. Numer. Anal
, 1998
"... Abstract. Krylov subspace based moment matching algorithms, such as PVL (Padé approximation Via the Lanczos process), have emerged as popular tools for efficient analyses of the impulse response in a large linear circuit. In this work, a new derivation of the PVL algorithm is presented from the matr ..."
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Cited by 28 (9 self)
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Abstract. Krylov subspace based moment matching algorithms, such as PVL (Padé approximation Via the Lanczos process), have emerged as popular tools for efficient analyses of the impulse response in a large linear circuit. In this work, a new derivation of the PVL algorithm is presented from the matrix point of view. This approach simplifies the mathematical theory and derivation of the algorithm. Moreover, an explicit formulation of the approximation error of the PVL algorithm is given. With this error expression, one may implement the PVL algorithm that adaptively determines the number of Lanczos steps required to satisfy a prescribed error tolerance. A number of implementation issues of the PVL algorithm and its error estimation are also addressed in this paper. A generalization to a multipleinputmultipleoutput circuit system via a block Lanczos process is also given.
BGenerating nearly optimally compact models from Krylovsubspace based reducedorder models
 IEEE Trans. Cts. Syst.VII: Sig. Proc
, 2000
"... Abstract—Automatic model reduction of chip, package, and board interconnect is now typically accomplished using momentmatching techniques, where the matching procedure is computed in a stable way using orthogonalized or biorthogonalized Krylovsubspace methods. Such methods are quite robust and r ..."
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Cited by 27 (4 self)
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Abstract—Automatic model reduction of chip, package, and board interconnect is now typically accomplished using momentmatching techniques, where the matching procedure is computed in a stable way using orthogonalized or biorthogonalized Krylovsubspace methods. Such methods are quite robust and reasonably efficient, though they can produce reducedorder models that are far from optimally accurate. In particular, when momentmatching methods are applied to generating a reducedorder model for interconnect which exhibits skin effects, the generated models have many more states than necessary. In this paper, we describe our twostep strategy in which we first compute mediumorder models using an efficient momentmatching method, and then nearly optimally reduce the mediumorder models using truncated balanced realization. Results on a spiral inductor and a package example demonstrate the effectiveness of the twostep approach. Index Terms — Frequency dependence, interconnect, modelorder reduction, packaging, parasitics.
grid physics and implications for CAD
 in Proc. DAC
, 2006
"... Much research has been done lately concerning analysis and optimization techniques for onchip power grid networks. However, all of these approaches assume a particular model or behavior of the power delivery. In this paper, we describe the first detailed fulldie dynamic model of an industrial micr ..."
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Cited by 26 (1 self)
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Much research has been done lately concerning analysis and optimization techniques for onchip power grid networks. However, all of these approaches assume a particular model or behavior of the power delivery. In this paper, we describe the first detailed fulldie dynamic model of an industrial microprocessor design, including package and nonuniform decap distribution. This model is justified from the ground up using a fullwave model and then increasingly larger but less detailed models with only the irrelevant elements removed. Using these models we show that there is little impact of ondie inductance in such a design, and that the package is critical to understanding resonant properties of the grid. We also show that transient effects are sensitive to nonuniform decap distribution and that locality is a tight function of frequency and of the packagedie resonance, producing newly explained localized resonant effects. Specifically, all of these points have impact on what kind of analysis and optimization are required from CAD. Categories & Subject Descriptors: