Symbolic analog-circuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. Existing approaches rely on two forms of symbolic expression representation: expanded sum-of-product form or arbitrarily nested form. Expanded form suffers the problem that the number of product terms grows exponentially with the size of a circuit, and approximation has to be used. Nested form is not canonical, i.e., many representations exist for a symbolic expression, and manipulations with the nested form are often complicated. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graph---called determinant decision diagram (DDD)---and performing symbolic analysis by graph manipulations. We showed that DDD construction, as well as many symbolic analysis algorithms, can be performed in time complex...

A novel hierarchical approach is proposed to symbolic analysis of large analog circuits. The key idea is to use a graph-based representation -- called Determinant Decision Diagram (DDD) -- to represent the symbolic determinant and cofactors associated with the MNA matrix for each subcircuit block. By exploiting the inherent sharing and sparsity of symbolic expressions, DDD is capable of representing a huge number of symbolic product terms in a canonical and highly-compact manner. Further, it enables cofactoring and sensitivity computation to be performed with time linear in the size of DDD. Experimental results have demonstrated that our method outperforms the best-known existing hierarchical symbolic analyzer SCAPP, and sometimes even numerical simulator SPICE.

Symbolic analog-circuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graph---called determinant decision diagram (DDD)---and performing symbolic analysis by graph manipulations. We showed that DDD construction and DDD-based symbolic analysis can be performed in time complexity proportional to the number of DDD vertices. We described a vertex ordering heuristic, and showed that the number of DDD vertices can be quite small---usually orders-of-magnitude less than the number of product terms. The algorithm has been implemented. An order-of-magnitude improvement in both CPU time and memory usages over existing symbolic analyzers ISAAC and Maple-V has been observed for large analog circuits. 1. Introduction Symbolic a...

This paper proposes a novel wideband modeling technique for high-performance RF passives and linear(ized) analog circuits. The new method is based on a recently proposed sdomain hierarchical modeling and analysis method [27]. Theoretically, we show that the s-domain hierarchical reduction is equivalent to implicit moment matching around s = 0, and that the existing hierarchical reduction method by one-point expansion is numerically stable for general tree-structured circuits. Practically, we propose a hierarchical multi-point reduction scheme for high-fidelity, wideband modeling of general passive or active linear circuits. A novel explicit waveform matching algorithm is proposed for searching the dominant poles and residues from different expansion points based on the unique hierarchical reduction framework. Experimental results with large analog circuits, on-chip spiral inductors are presented to validate the proposed method. I.

A new approach is proposed to hierarchical symbolic analysis of large analog integrated circuits. It consists of performing symbolic suppression of each subcircuit to its terminals in terms of subcircuit matrix determinants and cofactors, and applying Cramer's rule to solve symbolically the set of equations at the top level of the circuit hierarchy. The novelty of the proposed approach is to use an annotated, directed and acyclic graph, called Determinant Decision Diagram (DDD), to represent symbolic determinants of subcircuit matrices and cofactors used in subcircuit suppression, as well as symbolic determinants of the top-level circuit matrix and cofactors required in applying Cramer's rule. DDD enables systematically exploiting the inherent sparsity of circuit matrices and the sharing of symbolic expressions. It is capable of representing a huge number of symbolic product terms in a canonical and highly compact manner. The proposed approach is illustrated using a Cauer parameter low...

Abstract—This paper proposes a novel approach to the exact symbolic analysis of very large analog circuits. The new method is based on determinant decision diagrams (DDDs) representing symbolic product terms. But instead of constructing DDD graphs directly from a flat circuit matrix, the new method constructs DDD graphs in a hierarchical way based on hierarchically defined circuit structures. The resulting algorithm can analyze much larger analog circuits exactly than before. The authors show that exact symbolic expressions of a circuit are cancellation-free expressions when the circuit is analyzed hierarchically. With this, the authors propose a novel symbolic decancellation process, which essentially leads to the hierarchical DDD graph constructions. The new algorithm partially avoids the exponential DDD construction time by employing more efficient DDD graph operations during the hierarchical construction. The experimental results show that very large analog circuits, which cannot be analyzed exactly before like UPS and other unstructured circuits up to 100 nodes, can be analyzed by the new approach for the first time. The new approach significantly improves the exact symbolic capacity and promises huge potentials for the applications of exact symbolic analysis. Index Terms—Behavioral modeling, circuit simulation, symbolic analysis. I.

This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the analysis process. Consequently, the circuit sizes that can be analyzed increase dramatically, without suffering from the combinatorial explosion of expression complexity. Moreover, the interpretability and usability in practical applications is enabled by providing analytical models that keep complexity at a minimum with the prescribed accuracy.

This paper presents a novel method to automatically generate symbolic expressions for both linear and nonlinear circuit characteristics using a template-based fitting of numerical, simulated data. The aim of the method is to generate convex, interpretable expressions. The posynomiality of the generated expressions enables the use of efficient geometric programming techniques when using these expressions for circuit sizing and optimization. Attention is paid to estimating the relative `goodness-of-fit' of the generated expressions. Experimental results illustrate the capabilities of the approach.

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Techniques from algebra and graph theory are employed as interconnected systems are studied from an abstract point of view. A theory of signal flow graphs over rings is developed which embodies aspects of the theory of linear equations over rings most relevant to large-scale systems. The classic gain formulas of Mason and Riegle are shown to be valid for systems over a commutative and noncommutative ring respectively. A new sufficient condition for existence and uniqueness is introduced, namely, if the cycle products are contained in the Jacobson radical, then the system of linear equations has a unique solution, and the corresponding signal flow graph admits a unique reduction. The technique of ring localization allows the complete characterization of a family of signal flow graphs whose edge operators are in a certain ring and whose cycle products are in a certain ideal. 3 Contents 1