This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state-of-the-art in this field is also studied, pointing out directions for future research. 1. INTRODUCTION Circuit analysis is a basic milestone for efficient design of integrated circuits. Ever since powerful computers have been available, designers have developed programs to analyze circuits automatically. Today, all electrical engineering professionals and students use electrical simulators (such as HSPICE or ELDO). However, electrical simulators do not cover all the analysis tasks required for integrated circuit design. Essentially, they only serve to verify the performance of previously sized circuits. Among other things, designers must be able to predict the behavior of unsized circuits by tracing relationships among performance figures and design parameters. These relationships may be in the form of transfer functions, poles and ...

In this paper we present a technique for constraint allocation in analog system synthesis. Constraint allocation is the process of assigning constraint budgets to the subsystems so that the user asserted system level constraints are satisfied. Our approach is based on the formulation of the constraint allocation problem as a constraint satisfaction problem (CSP) and solving it. The solution method employed uses interval techniques to check for the satisfiability of the CSP. The generation of the exact set of solutions is done by an interval reduction and instantiation mechanism. We also discuss the constraint allocation mechanism in the context of a mixed-signal synthesis system. Finally, we present a design example to validate the constraint allocation technique. 1 Introduction Constraint allocation is an important step in analog system synthesis. Given the system level constraints, constraint allocation refers to the process of assigning constraint budgets to each of the components...

Session 2 Mixed-signal modeling Modeling and simulation of a Sigma-Delta digital to analog converter using VHDL-AMS

Although many design tools have been developed for digital design, analog design tools are only just being introduced. This paper presents a new optimization method for automatically sizing the circuit topology of analog cells. This method minimizes a cost function, which depends on a set of designer specifications. It employs the tabu search heuristic to avoid being trapped in a local minimum of the cost function. Experimental results show that this method can get very close to the global minimum of the cost function with a small number of iterations. Hence, an analog simulation program, such as SPICE, can be used for the evaluation of the cost function at each iteration. I. INTRODUCTION There is an increasing trend towards the integration of analog blocks in ASIC circuits. Despite the great effort that has been made in the development of CAD tools for analog and mixed circuits, the design of the analog part of a chip continues to be a bottleneck [1]--[2]. Different optimization tec...